HD6413003TF16V Renesas Electronics America, HD6413003TF16V Datasheet - Page 165

• Manufacturer Part Number: HD6413003TF16V
• Description: MCU 5V 0K PB-FREE 112-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD6413003TF16V

• Core Size: 16-Bit
• Oscillator Type: Internal
• Core Processor: H8/300H
• Speed: 16MHz
• Connectivity: SCI
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 50
• Program Memory Type: ROMless
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• No. Of I/o's: 58
• Ram Memory Size: 512Byte
• Cpu Speed: 16MHz
• No. Of Timers: 11
• No. Of Pwm Channels: 4
• Digital Ic Case Style: QFP
• Supply Voltage: RoHS Compliant
• Controller Family/series: H8/300H
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Interval Timer: When PSRAME = 0 and DRAME = 0, the refresh controller operates as an
interval timer. After setting RTCOR, select an input clock in RTMCSR and set the CMIE bit to 1.
CMI interrupts will be requested at compare match intervals determined by RTCOR and bits
CKS2 to CKS0 in RTMCSR.
When setting RTCOR, RTMCSR, and RFSHCR, make sure that PSRAME = 0 and DRAME = 0.
Writing is disabled when either of these bits is set to 1.
7.3.2 DRAM Refresh Control
Refresh Request Interval and Refresh Cycle Execution: The refresh request interval is
determined by the settings of RTCOR and bits CKS2 to CKS0 in RTMCSR. Figure 7-2 illustrates
the refresh request interval.
Refresh requests are generated at regular intervals as shown in figure 7-2, but the refresh cycle is
not actually executed until the refresh controller gets the bus right.
Table 7-4 summarizes the relationship among area 3 settings, DRAM read/write cycles, and
refresh cycles.
RTCOR
H'00
Refresh request
Figure 7-2 Refresh Request Interval (RCYCE = 1)
RTCNT
145