HD6413003TF16V Renesas Electronics America, HD6413003TF16V Datasheet - Page 454

• Manufacturer Part Number: HD6413003TF16V
• Description: MCU 5V 0K PB-FREE 112-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD6413003TF16V

• Core Size: 16-Bit
• Oscillator Type: Internal
• Core Processor: H8/300H
• Speed: 16MHz
• Connectivity: SCI
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 50
• Program Memory Type: ROMless
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• No. Of I/o's: 58
• Ram Memory Size: 512Byte
• Cpu Speed: 16MHz
• No. Of Timers: 11
• No. Of Pwm Channels: 4
• Digital Ic Case Style: QFP
• Supply Voltage: RoHS Compliant
• Controller Family/series: H8/300H
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Bit 7—Transmit Interrupt Enable (TIE): Enables or disables the transmit-data-empty interrupt
(TXI) requested when the TDRE flag in SSR is set to 1 due to transfer of serial transmit data from
TDR to TSR.
Bit 7
TIE
0
1
Note: * TXI interrupt requests can be cleared by reading the value 1 from the TDRE flag, then
Bit 6—Receive Interrupt Enable (RIE): Enables or disables the receive-data-full interrupt (RXI)
requested when the RDRF flag is set to 1 in SSR due to transfer of serial receive data from RSR to
RDR; also enables or disables the receive-error interrupt (ERI).
Bit 6
RIE
0
1
Note: * RXI and ERI interrupt requests can be cleared by reading the value 1 from the RDRF, FER,
Bit 5—Transmit Enable (TE): Enables or disables the start of SCI serial transmitting operations.
Bit 5
TE
0
1
Notes: 1. The TDRE bit is locked at 1 in SSR.
clearing it to 0; or by clearing the TIE bit to 0.
PER, or ORER flag, then clearing it to 0; or by clearing the RIE bit to 0.
2. In the enabled state, serial transmitting starts when the TDRE bit in SSR is cleared to 0
Description
Transmit-data-empty interrupt request (TXI) is disabled*
Transmit-data-empty interrupt request (TXI) is enabled
Description
Receive-end (RXI) and receive-error (ERI) interrupt requests are disabled (Initial value)
Receive-end (RXI) and receive-error (ERI) interrupt requests are enabled
Description
Transmitting disabled
Transmitting enabled
after writing of transmit data into TDR. Select the transmit format in SMR before setting
the TE bit to 1.
*2
*1
434
(Initial value)
(Initial value)