HD6413003TF16V Renesas Electronics America, HD6413003TF16V Datasheet - Page 90

• Manufacturer Part Number: HD6413003TF16V
• Description: MCU 5V 0K PB-FREE 112-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD6413003TF16V

• Core Size: 16-Bit
• Oscillator Type: Internal
• Core Processor: H8/300H
• Speed: 16MHz
• Connectivity: SCI
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 50
• Program Memory Type: ROMless
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• No. Of I/o's: 58
• Ram Memory Size: 512Byte
• Cpu Speed: 16MHz
• No. Of Timers: 11
• No. Of Pwm Channels: 4
• Digital Ic Case Style: QFP
• Supply Voltage: RoHS Compliant
• Controller Family/series: H8/300H
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.3 Interrupts
Interrupt exception handling can be requested by nine external sources (NMI, IRQ
34 internal sources in the on-chip supporting modules. Figure 4-4 classifies the interrupt sources
and indicates the number of interrupts of each type.
The on-chip supporting modules that can request interrupts are the watchdog timer (WDT),
refresh controller, 16-bit integrated timer-pulse unit (ITU), DMA controller (DMAC), serial
communication interface (SCI), and A/D converter. Each interrupt source has a separate vector
address.
NMI is the highest-priority interrupt and is always accepted. Interrupts are controlled by the
interrupt controller. The interrupt controller can assign interrupts other than NMI to two priority
levels, and arbitrate between simultaneous interrupts. Interrupt priorities are assigned in interrupt
priority registers A and B (IPRA and IPRB) in the interrupt controller.
For details on interrupts see section 5, Interrupt Controller.
Notes: Numbers in parentheses are the number of interrupt sources.
1.
2.
Interrupts
When the watchdog timer is used as an interval timer, it generates an interrupt
request at every counter overflow.
When the refresh controller is used as an interval timer, it generates an interrupt
request at compare match.
Figure 4-4 Interrupt Sources and Number of Interrupts
External interrupts
Internal interrupts
70
NMI (1)
IRQ to IRQ (8)
WDT
Refresh controller
ITU (15)
DMAC (8)
SCI (8)
A/D converter (1)
0
*1
(1)
7
*2
(1)
0
to IRQ
7
) and