HD6413003TF16V Renesas Electronics America, HD6413003TF16V Datasheet - Page 297

• Manufacturer Part Number: HD6413003TF16V
• Description: MCU 5V 0K PB-FREE 112-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD6413003TF16V

• Core Size: 16-Bit
• Oscillator Type: Internal
• Core Processor: H8/300H
• Speed: 16MHz
• Connectivity: SCI
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 50
• Program Memory Type: ROMless
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• No. Of I/o's: 58
• Ram Memory Size: 512Byte
• Cpu Speed: 16MHz
• No. Of Timers: 11
• No. Of Pwm Channels: 4
• Digital Ic Case Style: QFP
• Supply Voltage: RoHS Compliant
• Controller Family/series: H8/300H
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Port C Data Direction Register (PCDDR): PCDDR is an 8-bit write-only register that can select
input or output for each pin in port C.
When bits in PCDDR are set to 1, pins PC
pins PC
corresponding pins become input pins.
PCDDR is a write-only register. Its value cannot be read. All bits return 1 when read.
PCDDR is initialized to H'00 by a reset and in hardware standby mode. In software standby mode
it retains its previous setting, so if a PCDDR bit is set to 1, the corresponding pin maintains its
output state in software standby mode.
Port C Data Register (PCDR): PCDR is an 8-bit readable/writable register that stores data for
pins PC
When a bit in PCDDR is set to 1, if port C is read the value of the corresponding PCDR bit is
returned directly. When a bit in PCDDR is cleared to 0, if port C is read the corresponding pin
level is read.
PCDR is initialized to H'00 by a reset and in hardware standby mode. In software standby mode it
retains its previous setting.
Bit
Initial value
Read/Write
Bit
Initial value
Read/Write
5
7
to PC
to PC
2
0
.
become CS
PC DDR
PC
R/W
7
W
0
7
0
7
7
PC DDR
7
PC
R/W
to CS
6
W
0
6
0
6
6
4
PC DDR
output pins. When bits in PCDDR are cleared to 0, the
PC
R/W
5
W
0
5
0
5
Port C data direction 7 to 0
These bits select input or output for port C pins
7
5
, PC
Port C data 7 to 0
These bits store data for port C pins
PC DDR
277
6
, PC
PC
R/W
4
W
0
4
0
4
4
1
, and PC
PC DDR
PC
R/W
3
W
0
3
0
3
0
3
become generic output pins and
PC DDR
PC
R/W
2
W
0
2
0
2
2
PC DDR
PC
R/W
1
W
1
0
0
1
1
PC DDR
PC
R/W
0
W
0
0
0
0
0