HD6413003TF16V Renesas Electronics America, HD6413003TF16V Datasheet - Page 288

MCU 5V 0K PB-FREE 112-QFP

HD6413003TF16V

Manufacturer Part Number
HD6413003TF16V
Description
MCU 5V 0K PB-FREE 112-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD6413003TF16V

Core Size
16-Bit
Oscillator Type
Internal
Core Processor
H8/300H
Speed
16MHz
Connectivity
SCI
Peripherals
DMA, PWM, WDT
Number Of I /o
50
Program Memory Type
ROMless
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
No. Of I/o's
58
Ram Memory Size
512Byte
Cpu Speed
16MHz
No. Of Timers
11
No. Of Pwm Channels
4
Digital Ic Case Style
QFP
Supply Voltage
RoHS Compliant
Controller Family/series
H8/300H
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Part Number
Manufacturer
Quantity
Price
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Manufacturer:
ITT
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Part Number:
HD6413003TF16V
Manufacturer:
RENESAS
Quantity:
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Part Number:
HD6413003TF16V
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9.9 Port B
9.9.1 Overview
Port B is an 8-bit input/output port that is also used for output (TP
programmable timing pattern controller (TPC), input/output (TIOCB
TIOCA
(DREQ
B has the same set of pin functions in all operating modes. Figure 9-12 shows the pin
configuration of port B.
Pins in port B can drive one TTL load and a 30-pF capacitive load. They can also drive a
darlington transistor pair. Pins PB
9.9.2 Register Descriptions
Table 9-15 summarizes the registers of port B.
Table 9-15 Port B Registers
Address*
H'FFD4
H'FFD6
Note: * Lower 16 bits of the address.
3
1
) and output (TOCXB
, DREQ
Port B
Name
Port B data direction register
Port B data register
0
) to the DMA controller (DMAC), and ADTRG input to the A/D converter. Port
Figure 9-12 Port B Pin Configuration
Port B pins
PB (input/output)/TP
PB (input/output)/TP
PB (input/output)/TP
PB (input/output)/TP
PB (input/output)/TP
PB (input/output)/TP
PB (input/output)/TP
PB (input/output)/TP
4
, TOCXA
7
6
5
4
3
2
1
0
3
to PB
0
4
) by the 16-bit integrated timer-pulse unit (ITU), input
have Schmitt-trigger inputs.
268
15
14
13
12
11
10
9
8
(output)/DREQ (input)/
(output)/DREQ (input)
(output)/TOCXB (output)
(output)/TOCXA (output)
(output)/TIOCB (input/output)
(output)/TIOCA (input/output)
(output)/TIOCB (input/output)
(output)/TIOCA (input/output)
Abbreviation
PBDDR
PBDR
15
1
0
4
4
3
3
to TP
4
4
4
, TIOCB
R/W
W
R/W
8
) from the
ADTRG
3
, TIOCA
Initial Value
H'00
H'00
(input)
4
,

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