HD6413003TF16V Renesas Electronics America, HD6413003TF16V Datasheet - Page 147

• Manufacturer Part Number: HD6413003TF16V
• Description: MCU 5V 0K PB-FREE 112-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD6413003TF16V

• Core Size: 16-Bit
• Oscillator Type: Internal
• Core Processor: H8/300H
• Speed: 16MHz
• Connectivity: SCI
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 50
• Program Memory Type: ROMless
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• No. Of I/o's: 58
• Ram Memory Size: 512Byte
• Cpu Speed: 16MHz
• No. Of Timers: 11
• No. Of Pwm Channels: 4
• Digital Ic Case Style: QFP
• Supply Voltage: RoHS Compliant
• Controller Family/series: H8/300H
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6.3.6 Interconnections with Memory (Example)
For each area, the bus controller can select two- or three-state access and an 8- or 16-bit data bus
width. In three-state-access areas, wait states can be inserted in a variety of modes, simplifying the
connection of both high-speed and low-speed devices.
Figure 6-18 shows an example of interconnections between the H8/3003 and memory. Figure 6-17
shows a memory map for this example.
A 256-kword
16-bit bus.
Two 32-kword 8-bit SRAM devices (SRAM1 and SRAM2) are connected to area 1. These
devices are accessed in two states via a 16-bit bus.
One 32-kword 8-bit SRAM (SRAM3) is connected to area 7. This device is accessed via an
8-bit bus, using three-state access with an additional wait state inserted in pin auto-wait mode.
H'000000
H'03FFFF
H'1FFFFF
H'200000
H'20FFFF
H'210000
H'3FFFFF
H'E00000
H'E07FFF
H'FFFFFF
16-bit EPROM is connected to area 0. This device is accessed in three states via a
Figure 6-17 Memory Map (Example)
On-chip registers
On-chip RAM
SRAM 1, 2
Not used
Not used
Not used
SRAM 3
EPROM
127
Area 0
16-bit, three-state-access area
Area 1
16-bit, two-state-access area
Area 7
8-bit, three-state-access area
(one auto-wait state)