HD6413003TF16V Renesas Electronics America, HD6413003TF16V Datasheet - Page 359

MCU 5V 0K PB-FREE 112-QFP

HD6413003TF16V

Manufacturer Part Number
HD6413003TF16V
Description
MCU 5V 0K PB-FREE 112-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD6413003TF16V

Core Size
16-Bit
Oscillator Type
Internal
Core Processor
H8/300H
Speed
16MHz
Connectivity
SCI
Peripherals
DMA, PWM, WDT
Number Of I /o
50
Program Memory Type
ROMless
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
No. Of I/o's
58
Ram Memory Size
512Byte
Cpu Speed
16MHz
No. Of Timers
11
No. Of Pwm Channels
4
Digital Ic Case Style
QFP
Supply Voltage
RoHS Compliant
Controller Family/series
H8/300H
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
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Manufacturer:
ITT
Quantity:
12 000
Part Number:
HD6413003TF16V
Manufacturer:
RENESAS
Quantity:
36
Part Number:
HD6413003TF16V
Manufacturer:
RENESAS/瑞萨
Quantity:
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Sample Setup Procedure for Reset-Synchronized PWM Mode: Figure 10-31 shows a sample
procedure for setting up reset-synchronized PWM mode.
Figure 10-31 Setup Procedure for Reset-Synchronized PWM Mode (Example)
Reset-synchronized PWM mode
Reset-synchronized PWM mode
Select counter clear source
Select reset-synchronized
Set general registers
Select counter clock
Stop counter
Start counter
PWM mode
Set TCNT
1
2
3
4
5
6
7
339
1. Clear the STR3 bit in TSTR to 0 to
2. Set bits TPSC2 to TPSC0 in TCR to
3. Set bits CCLR1 and CCLR0 in TCR3
4. Set bits CMD1 and CMD0 in TFCR to
5. Preset TCNT3 to H'0000. TCNT4
6. GRA3 is the waveform period register.
7. Set the STR3 bit in TSTR to 1 to start
halt TCNT3. Reset-synchronized
PWM mode must be set up while
TCNT3 is halted.
select the counter clock source for
channel 3. If an external clock source
is selected, select the external clock
edge(s) with bits CKEG1 and CKEG0
in TCR.
to select GRA3 compare match as
the counter clear source.
select reset-synchronized PWM mode.
TIOCA3, TIOCB3, TIOCA4, TIOCB4,
TOCXA4, and TOCXB4 automatically
become PWM output pins.
need not be preset.
Set the waveform period value in
GRA3. Set transition times of the
PWM output waveforms in GRB3,
GRA4, and GRB4. Set times within
the compare match range of TCNT3.
X
TCNT3.
GRA3 (X: setting value)

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