HD6413003TF16V Renesas Electronics America, HD6413003TF16V Datasheet - Page 233

• Manufacturer Part Number: HD6413003TF16V
• Description: MCU 5V 0K PB-FREE 112-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD6413003TF16V

• Core Size: 16-Bit
• Oscillator Type: Internal
• Core Processor: H8/300H
• Speed: 16MHz
• Connectivity: SCI
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 50
• Program Memory Type: ROMless
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• No. Of I/o's: 58
• Ram Memory Size: 512Byte
• Cpu Speed: 16MHz
• No. Of Timers: 11
• No. Of Pwm Channels: 4
• Digital Ic Case Style: QFP
• Supply Voltage: RoHS Compliant
• Controller Family/series: H8/300H
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 8-12 shows a sample setup procedure for block transfer mode.
Note:
Set destination address
Set block transfer count
Block transfer mode
Block transfer mode
Set source address
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Carry out settings 1 to 10 with the DEND interrupt masked in the CPU.
Set DTCRB (1)
Set DTCRA (1)
Set DTCRB (2)
Set DTCRA (2)
Set block size
Read DTCRB
Read DTCRA
Figure 8-12 Block Transfer Mode Setup Procedure (Example)
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Set the source address in MARA.
Set the destination address in MARB.
Set the block transfer count in ETCRB.
Set the block size (number of bytes or words)
in both ETCRAH and ETCRAL.
Set the DTCRB bits as follows.
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Set the DTCRA bits as follows.
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Read DTCRB with DTME cleared to 0.
Set the DTME bit to 1 in DTCRB.
Read DTCRA with DTE cleared to 0.
Set the DTE bit to 1 in DTCRA to enable
the transfer.
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Clear the DTME bit to 0.
Set the DAID and DAIDE bits to select whether
MARB is incremented, decremented, or held fixed.
Set or clear the TMS bit to make the block area
the source or destination.
Select the DMAC activation source with bits
DTS2B to DTS0B.
Clear the DTE to 0.
Select byte size or word size with the DTSZ bit.
Set the SAID and SAIDE bits to select whether
MARA is incremented, decremented, or held fixed.
Set or clear the DTIE bit to enable or disable the
CPU interrupt at the end of the transfer.
Set bits DTS2A to DTS0A all to 1 to select
block transfer mode.