HD6413003TF16V Renesas Electronics America, HD6413003TF16V Datasheet - Page 490

MCU 5V 0K PB-FREE 112-QFP

HD6413003TF16V

Manufacturer Part Number
HD6413003TF16V
Description
MCU 5V 0K PB-FREE 112-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD6413003TF16V

Core Size
16-Bit
Oscillator Type
Internal
Core Processor
H8/300H
Speed
16MHz
Connectivity
SCI
Peripherals
DMA, PWM, WDT
Number Of I /o
50
Program Memory Type
ROMless
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
No. Of I/o's
58
Ram Memory Size
512Byte
Cpu Speed
16MHz
No. Of Timers
11
No. Of Pwm Channels
4
Digital Ic Case Style
QFP
Supply Voltage
RoHS Compliant
Controller Family/series
H8/300H
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6413003TF16V
Manufacturer:
ITT
Quantity:
12 000
Part Number:
HD6413003TF16V
Manufacturer:
RENESAS
Quantity:
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Part Number:
HD6413003TF16V
Manufacturer:
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Transmitting Serial Data (Synchronous Mode): Figure 13-16 shows a sample flowchart for
transmitting serial data and indicates the procedure to follow.
TDR and clear TDRE flag
Read TDRE flag in SSR
Read TEND flag in SSR
Clear TE bit to 0 in SCR
Write transmit data in
Start transmitting
transmitted?
to 0 in SSR
TDRE = 1?
TEND = 1?
Initialize
All data
End
Yes
Yes
Yes
Figure 13-16 Sample Flowchart for Serial Transmitting
No
No
No
1
2
3
1.
2.
3.
470
SCI initialization: the transmit data output function
of the TxD pin is selected automatically.
SCI status check and transmit data write: read SSR,
check that the TDRE flag is 1, then write transmit
data in TDR and clear the TDRE flag to 0.
To continue transmitting serial data: after checking
that the TDRE flag is 1, indicating that data can be
written, write data in TDR, then clear the TDRE flag
to 0. When the DMAC is activated by a transmit-
data-empty interrupt request (TXI) to write data in
TDR, the TDRE flag is checked and cleared
automatically.

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