HD6413003TF16V Renesas Electronics America, HD6413003TF16V Datasheet - Page 55

MCU 5V 0K PB-FREE 112-QFP

HD6413003TF16V

Manufacturer Part Number
HD6413003TF16V
Description
MCU 5V 0K PB-FREE 112-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD6413003TF16V

Core Size
16-Bit
Oscillator Type
Internal
Core Processor
H8/300H
Speed
16MHz
Connectivity
SCI
Peripherals
DMA, PWM, WDT
Number Of I /o
50
Program Memory Type
ROMless
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
No. Of I/o's
58
Ram Memory Size
512Byte
Cpu Speed
16MHz
No. Of Timers
11
No. Of Pwm Channels
4
Digital Ic Case Style
QFP
Supply Voltage
RoHS Compliant
Controller Family/series
H8/300H
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6413003TF16V
Manufacturer:
ITT
Quantity:
12 000
Part Number:
HD6413003TF16V
Manufacturer:
RENESAS
Quantity:
36
Part Number:
HD6413003TF16V
Manufacturer:
RENESAS/瑞萨
Quantity:
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Table 2-7 Bit Manipulation Instructions
Instruction Size*
BSET
BCLR
BNOT
BTST
BAND
BIAND
Note: * Size refers to the operand size.
B: Byte
B
B
B
B
B
B
Function
1
Sets a specified bit in a general register or memory operand to 1. The bit
number is specified by 3-bit immediate data or the lower 3 bits of a general
register.
0
Clears a specified bit in a general register or memory operand to 0. The bit
number is specified by 3-bit immediate data or the lower 3 bits of a general
register.
¬ (<bit-No.> of <EAd>)
Inverts a specified bit in a general register or memory operand. The bit
number is specified by 3-bit immediate data or the lower 3 bits of a general
register.
¬ (<bit-No.> of <EAd>)
Tests a specified bit in a general register or memory operand and sets or
clears the Z flag accordingly. The bit number is specified by 3-bit immediate
data or the lower 3 bits of a general register.
C
ANDs the carry flag with a specified bit in a general register or memory
operand and stores the result in the carry flag.
C
ANDs the carry flag with the inverse of a specified bit in a general register or
memory operand and stores the result in the carry flag.
The bit number is specified by 3-bit immediate data.
(<bit-No.> of <EAd>)
[¬ (<bit-No.> of <EAd>)]
(<bit-No.> of <EAd>)
(<bit-No.> of <EAd>)
35
(<bit-No.> of <EAd>)
Z
C
C

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