HD6413003TF16V Renesas Electronics America, HD6413003TF16V Datasheet - Page 362

• Manufacturer Part Number: HD6413003TF16V
• Description: MCU 5V 0K PB-FREE 112-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD6413003TF16V

• Core Size: 16-Bit
• Oscillator Type: Internal
• Core Processor: H8/300H
• Speed: 16MHz
• Connectivity: SCI
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 50
• Program Memory Type: ROMless
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• No. Of I/o's: 58
• Ram Memory Size: 512Byte
• Cpu Speed: 16MHz
• No. Of Timers: 11
• No. Of Pwm Channels: 4
• Digital Ic Case Style: QFP
• Supply Voltage: RoHS Compliant
• Controller Family/series: H8/300H
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Setup Procedure for Complementary PWM Mode: Figure 10-33 shows a sample procedure for
setting up complementary PWM mode.
Note: After exiting complementary PWM mode, to resume operating in complementary
Figure 10-33 Setup Procedure for Complementary PWM Mode (Example)
PWM mode, follow the entire setup procedure from step 1 again.
Complementary PWM mode
Complementary PWM mode
Select complementary
Set general registers
Select counter clock
Start counters
Stop counting
PWM mode
Set TCNTs
1
2
3
4
5
6
342
1. Clear bits STR3 and STR4 to 0 in
2. Set bits TPSC2 to TPSC0 in TCR to
3. Set bits CMD1 and CMD0 in TFCR
4. Clear TCNT4 to H'0000. Set the
5. GRA3 is the waveform period
6. Set bits STR3 and STR4 in TSTR to
TSTR to halt the timer counters.
Complementary PWM mode must be
set up while TCNT3 and TCNT4 are
halted.
select the same counter clock source
for channels 3 and 4. If an external
clock source is selected, select the
external clock edge(s) with bits
CKEG1 and CKEG0 in TCR. Do not
select any counter clear source
with bits CCLR1 and CCLR0 in TCR.
to select complementary PWM mode.
TIOCA3, TIOCB3, TIOCA4, TIOCB4,
TOCXA4, and TOCXB4 automatically
become PWM output pins.
non-overlap margin in TCNT3. Do not
set TCNT3 and TCNT4 to the same
value.
register. Set the upper limit value of
TCNT3 minus 1 in GRA3. Set
transition times of the PWM output
waveforms in GRB3, GRA4, and
GRB4. Set times within the compare
match range of TCNT3 and TCNT4.
T
GRA4, or GRB4. T: initial setting of
TCNT3)
1 to start TCNT3 and TCNT4.
X (X: initial setting of GRB3,