SI4431-A0-FM Silicon Laboratories Inc, SI4431-A0-FM Datasheet - Page 144
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SI4431-A0-FM
Manufacturer Part Number
SI4431-A0-FM
Description
IC TXRX ISM 930MHZ 3.6V 20-QFN
Manufacturer
Silicon Laboratories Inc
Specifications of SI4431-A0-FM
Package / Case
20-QFN
Mfg Application Notes
Transitioning SI4430/31 to Rev B
Frequency
240MHz ~ 930MHz
Data Rate - Maximum
128kbps
Modulation Or Protocol
FSK, GFSK, OOK
Power - Output
13dBm
Sensitivity
-118dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
18.5mA
Current - Transmitting
28mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Number Of Receivers
2
Number Of Transmitters
1
Wireless Frequency
240 MHz to 930 MHz
Output Power
13 dBm
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Maximum Supply Current
28 mA
Minimum Operating Temperature
- 40 C
Modulation
FSK, GFSK, OOK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Applications
-
Memory Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
336-1633-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SI4431-A0-FMR
Manufacturer:
SILICON
Quantity:
3 500
Part Number:
SI4431-A0-FMR
Manufacturer:
SILICONLABS/芯科
Quantity:
20 000
Register 69h. AGC Override 1
Register 6Ah. AGC Override 2
Si4431
Reset value = 00100000
Reset value = 10011101
144
Name
Name
Type
Type
Bit
Bit
7:6
3:0
5:2
1:0
Bit
Bit
5
4
7
6
lnacomp[3:0] LNA Gain Compensation.
agcovpm
pgath[1:0]
Reserved
agcovpm
pga[3:0]
agcslow
lnagain
R/W
Name
agcen
Name
D7
D7
Reserved
R
agcslow
Reserved.
Automatic Gain Control Enable.
When this bit is set then the result of the control can be read out from bits [4:0], otherwise
the gain can be controlled manually by writing into bits [4:0].
LNA Gain Select.
0 – min. gain = 5 dB
PGA Gain Override Value.
000:
001:
010:
...
101:
If set, AGC will ignore the Preamble Detection.
AGC Slow Gain Increase Enable.
When this bit is set then the AGC loop will slow down the gain increase in the receiver.
The speed of the gain reduction is not affected.
This bit is used for smoothing RSSI value when LNA gain is switched.
Window Comparator Reference Voltage Adjust in the PGA.
R/W
D6
D6
0 dB
3 dB
6 dB
24 dB max.
agcen
R/W
D5
D5
Preliminary Rev. 0.4
lnagain
1 – max. gain = 25 dB
R/W
D4
D4
lnacomp[3:0]
R/W
Function
Function
D3
D3
D2
D2
pga[3:0]
R/W
D1
D1
pgath[1:0]
R/W
D0
D0