SI4431-A0-FM Silicon Laboratories Inc, SI4431-A0-FM Datasheet - Page 85
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SI4431-A0-FM
Manufacturer Part Number
SI4431-A0-FM
Description
IC TXRX ISM 930MHZ 3.6V 20-QFN
Manufacturer
Silicon Laboratories Inc
Specifications of SI4431-A0-FM
Package / Case
20-QFN
Mfg Application Notes
Transitioning SI4430/31 to Rev B
Frequency
240MHz ~ 930MHz
Data Rate - Maximum
128kbps
Modulation Or Protocol
FSK, GFSK, OOK
Power - Output
13dBm
Sensitivity
-118dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
18.5mA
Current - Transmitting
28mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Number Of Receivers
2
Number Of Transmitters
1
Wireless Frequency
240 MHz to 930 MHz
Output Power
13 dBm
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Maximum Supply Current
28 mA
Minimum Operating Temperature
- 40 C
Modulation
FSK, GFSK, OOK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Applications
-
Memory Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
336-1633-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SI4431-A0-FMR
Manufacturer:
SILICON
Quantity:
3 500
Part Number:
SI4431-A0-FMR
Manufacturer:
SILICONLABS/芯科
Quantity:
20 000
Register 03h. Interrupt/Status 1
Reset value = xxxxxxxx
When any of the Interrupt/Status 1 bits change state from 0 to 1 the device will notify the microcontroller by setting
the nIRQ pin LOW if it is enabled in the Interrupt Enable 1 register. The nIRQ pin will go to HIGH and all the
enabled interrupt bits will be cleared when the microcontroller reads this address. If any of these bits is not enabled
in the Interrupt Enable 1 register then it becomes a status signal that can be read anytime in the same location and
will not be cleared by reading the register.
Name
Type
Bit
Bit
7
6
5
4
3
2
1
0
icrcerror
itxffaem
itxffafull
irxffafull
ipkvalid
ifferr
ipksent
Name
D7
R
ifferr
iext
itxffafull
FIFO Underflow/Overflow Error.
When set to 1 the TX or RX FIFO has overflowed or underflowed.
TX FIFO Almost Full.
When set to 1 the TX FIFO has met its almost full threshold and needs to be transmitted.
TX FIFO Almost Empty.
When set to 1 the TX FIFO is almost empty and needs to be filled.
RX FIFO Almost Full. When set to 1 the RX FIFO has met its almost full threshold and
needs to be read by the microcontroller.
External Interrupt.
When set to 1 an interrupt occurred on one of the GPIO’s if it is programmed so. The sta-
tus can be checked in register 0Eh. See GPIOx Configuration section for the details.
Packet Sent Interrupt.
When set to1 a valid packet has been transmitted.
Valid Packet Received. When set to 1 a valid packet has been received.
CRC Error.
When set to 1 the cyclic redundancy check is failed.
D6
R
ixtffaem
D5
R
Preliminary Rev. 0.4
irxffafull
D4
R
Function
iext
D3
R
ipksent
D2
R
ipkvalid
D1
R
Si4431
icrerror
D0
R
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