SI4431-A0-FM Silicon Laboratories Inc, SI4431-A0-FM Datasheet - Page 22
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SI4431-A0-FM
Manufacturer Part Number
SI4431-A0-FM
Description
IC TXRX ISM 930MHZ 3.6V 20-QFN
Manufacturer
Silicon Laboratories Inc
Specifications of SI4431-A0-FM
Package / Case
20-QFN
Mfg Application Notes
Transitioning SI4430/31 to Rev B
Frequency
240MHz ~ 930MHz
Data Rate - Maximum
128kbps
Modulation Or Protocol
FSK, GFSK, OOK
Power - Output
13dBm
Sensitivity
-118dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
18.5mA
Current - Transmitting
28mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Number Of Receivers
2
Number Of Transmitters
1
Wireless Frequency
240 MHz to 930 MHz
Output Power
13 dBm
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Maximum Supply Current
28 mA
Minimum Operating Temperature
- 40 C
Modulation
FSK, GFSK, OOK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Applications
-
Memory Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
336-1633-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SI4431-A0-FMR
Manufacturer:
SILICON
Quantity:
3 500
Part Number:
SI4431-A0-FMR
Manufacturer:
SILICONLABS/芯科
Quantity:
20 000
Si4431
3.2.1. Shutdown State
The shutdown state is the lowest current consumption state of the device with nominally less than 10 nA of current
consumption. The shutdown state may be entered by driving the SDN pin (Pin 20) high. The SDN pin should be
held low in all states except the SHUTDOWN state. In the SHUTDOWN state, the contents of the registers are lost
and there is no SPI access.
When the chip is connected to the power supply, a POR will be initiated after the falling edge of SDN.
3.2.2. Idle State
There are five different modes in the IDLE state which may be selected by "Register 07h. Operating Mode and
Function Control 1". All modes have a tradeoff between current consumption and response time to TX/RX mode.
This tradeoff is shown in Table 11. After the POR event, SWRESET, or exiting from the SHUTDOWN state the chip
will default to the IDLE-READY mode. After a POR event the interrupt registers must be read to properly enter the
SLEEP, SENSOR, or STANDBY mode and to control the 32 kHz clock correctly.
3.2.2.1. STANDBY Mode
STANDBY mode has the lowest current consumption possible with only the LPLDO enabled to maintain the
register values. In this mode the registers can be accessed in both read and write mode. The standby mode can be
entered by writing 0h to "Register 07h. Operating Mode and Function Control 1". If an interrupt has occurred (i.e.,
the nIRQ pin = 0) the interrupt registers must be read to achieve the minimum current consumption. Additionally,
the ADC should not be selected as an input to the GPIO in this mode as it will cause excess current consumption.
3.2.2.2. SLEEP Mode
In SLEEP mode the LPLDO is enabled along with the Wake-Up-Timer, which can be used to accurately wake-up
the radio at specified intervals. See "8.6. Wake-Up Timer" on page 63 for more information on the Wake-Up-Timer.
Sleep mode is entered by setting enwt = 1 (40h) in "Register 07h. Operating Mode and Function Control 1". If an
interrupt has occurred (i.e., the nIRQ pin = 0) the interrupt registers must be read to achieve the minimum current
consumption. Also, the ADC should not be selected as an input to the GPIO in this mode as it will cause excess
current consumption.
3.2.2.3. SENSOR Mode
In SENSOR Mode either the Low Battery Detector, Temperature Sensor, or both may be enabled in addition to the
LPLDO and Wake-Up-Timer. The Low Battery Detector can be enabled by setting enlbd = 1 and the temperature
sensor can be enabled by setting ents = 1 in "Register 07h. Operating Mode and Function Control 1". See "8.4.
Temperature Sensor" on page 60 and "8.5. Low Battery Detector" on page 62 for more information on these
features. If an interrupt has occurred (i.e., the nIRQ pin = 0) the interrupt registers must be read to achieve the
minimum current consumption.
3.2.2.4. READY Mode
READY Mode is designed to give a fast transition time to TX mode with reasonable current consumption. In this
mode the Crystal oscillator remains enabled reducing the time required to switch to the TX or RX mode by
eliminating the crystal start-up time. Ready mode is entered by setting xton = 1 in "Register 07h. Operating Mode
and Function Control 1". To achieve the lowest current consumption state the crystal oscillator buffer should be
disabled. This is done by setting "Register 62h. Crystal Oscillator/Power-on-Reset Control" to a value of 02h. To
exit ready mode, bufovr (bit 1) of this register must be set back to 0.
3.2.2.5. TUNE Mode
In TUNE Mode the PLL remains enabled in addition to the other blocks enabled in the IDLE modes. This will give
the fastest response to TX mode as the PLL will remain locked but it results in the highest current consumption.
This mode of operation is designed for Frequency Hopping Systems (FHS). Tune mode is entered by setting pllon
= 1 in "Register 07h. Operating Mode and Function Control 1". It is not necessary to set xton to 1 for this mode, the
internal state machine automatically enables the crystal oscillator.
22
Preliminary Rev. 0.4