SI4431-A0-FM Silicon Laboratories Inc, SI4431-A0-FM Datasheet - Page 90

• Manufacturer Part Number: SI4431-A0-FM
• Description: IC TXRX ISM 930MHZ 3.6V 20-QFN
• Manufacturer: Silicon Laboratories Inc

Specifications of SI4431-A0-FM

• Package / Case: 20-QFN
• Mfg Application Notes: Transitioning SI4430/31 to Rev B
• Frequency: 240MHz ~ 930MHz
• Data Rate - Maximum: 128kbps
• Modulation Or Protocol: FSK, GFSK, OOK
• Power - Output: 13dBm
• Sensitivity: -118dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 18.5mA
• Current - Transmitting: 28mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Number Of Receivers: 2
• Number Of Transmitters: 1
• Wireless Frequency: 240 MHz to 930 MHz
• Output Power: 13 dBm
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Maximum Supply Current: 28 mA
• Minimum Operating Temperature: - 40 C
• Modulation: FSK, GFSK, OOK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Applications: -
• Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 336-1633-5

Register 06h. Interrupt Enable 2
Si4431
Reset value = 00000011
90
Name
Type
Bit
Bit
7
6
5
4
3
2
1
0
enpreainval
enswdet
enpreaval
enchiprdy
enswdet
Name
D7
enrssi
enwut
enpor
enlbd
R
enpreaval
Enable Sync Word Detected.
When mpreadet =1 the Preamble Detected Interrupt will be enabled.
Enable Valid Preamble Detected.
When mpreadet =1 the Valid Preamble Detected Interrupt will be enabled.
Enable Invalid Preamble Detected.
When mpreadet =1 the Invalid Preamble Detected Interrupt will be enabled.
Enable RSSI.
When set to 1 the RSSI Interrupt will be enabled.
Enable Wake-Up Timer.
When set to 1 the Wake-Up Timer interrupt will be enabled.
Enable Low Battery Detect.
When set to 1 the Low Battery Detect interrupt will be enabled.
Enable Chip Ready (XTAL).
When set to 1 the Chip Ready interrupt will be enabled.
Enable POR.
When set to 1 the POR interrupt will be enabled.
D6
R
enpreainval
D5
R
Preliminary Rev. 0.4
enrssi
D4
R
Function
enwut
R/W
D3
enlbd
R/W
D2
enchiprdy
R/W
D1
enpor
R/W
D0