SI4431-A0-FM Silicon Laboratories Inc, SI4431-A0-FM Datasheet - Page 148

• Manufacturer Part Number: SI4431-A0-FM
• Description: IC TXRX ISM 930MHZ 3.6V 20-QFN
• Manufacturer: Silicon Laboratories Inc

Specifications of SI4431-A0-FM

• Package / Case: 20-QFN
• Mfg Application Notes: Transitioning SI4430/31 to Rev B
• Frequency: 240MHz ~ 930MHz
• Data Rate - Maximum: 128kbps
• Modulation Or Protocol: FSK, GFSK, OOK
• Power - Output: 13dBm
• Sensitivity: -118dBm
• Voltage - Supply: 1.8 V ~ 3.6 V
• Current - Receiving: 18.5mA
• Current - Transmitting: 28mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Number Of Receivers: 2
• Number Of Transmitters: 1
• Wireless Frequency: 240 MHz to 930 MHz
• Output Power: 13 dBm
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Maximum Supply Current: 28 mA
• Minimum Operating Temperature: - 40 C
• Modulation: FSK, GFSK, OOK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Applications: -
• Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 336-1633-5

Register 71h. Modulation Mode Control 2
Si4431
Reset value = 00000000
The frequency deviation can be calculated: Fd = 625 Hz x fd[8:0].
148
Name
Type
Bit
7:6
5:4
1:0
Bit
3
2
modtyp[1:0]
dtmod[1:0]
trclk[1:0]
Name
D7
eninv
fd[8]
trclk[1:0]
R/W
TX Data Clock Configuration.
00:
01:
10:
11:
Modulation Source.
00:
01:
10:
11:
Invert TX and RX Data.
MSB of Frequency Deviation Setting, see "Register 72h. Frequency Deviation".
Modulation Type.
00:
01:
10:
11:
D6
No TX Data CLK is available (asynchronous mode – Can only work with modula-
TX Data CLK is available via the GPIO (one of the GPIO’s should be programmed
TX Data CLK is available via the SDO pin.
TX Data CLK is available via the nIRQ pin.
tions FSK or OOK).
as well).
Direct Mode using TX_Data function via the GPIO pin (one of the GPIO’s should
be programmed accordingly as well)
Direct Mode using TX_Data function via the SDI pin (only when nSEL is high)
FIFO Mode
PN9 (internally generated)
Unmodulated carrier
OOK
FSK
GFSK (enable TX Data CLK (trclk[1:0]) when direct mode is used)
D5
dtmod[1:0]
R/W
Preliminary Rev. 0.4
D4
Function
eninv
R/W
D3
fd[8]
R/W
D2
D1
modtyp[1:0]
R/W
D0