SI4431-A0-FM Silicon Laboratories Inc, SI4431-A0-FM Datasheet - Page 7

IC TXRX ISM 930MHZ 3.6V 20-QFN

SI4431-A0-FM

Manufacturer Part Number
SI4431-A0-FM
Description
IC TXRX ISM 930MHZ 3.6V 20-QFN
Manufacturer
Silicon Laboratories Inc
Datasheets

Specifications of SI4431-A0-FM

Package / Case
20-QFN
Mfg Application Notes
Transitioning SI4430/31 to Rev B
Frequency
240MHz ~ 930MHz
Data Rate - Maximum
128kbps
Modulation Or Protocol
FSK, GFSK, OOK
Power - Output
13dBm
Sensitivity
-118dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
18.5mA
Current - Transmitting
28mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Number Of Receivers
2
Number Of Transmitters
1
Wireless Frequency
240 MHz to 930 MHz
Output Power
13 dBm
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Maximum Supply Current
28 mA
Minimum Operating Temperature
- 40 C
Modulation
FSK, GFSK, OOK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Applications
-
Memory Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
336-1633-5

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L
Table 1. DC Characteristics .......................................................................................................8
Table 2. Synthesizer AC Electrical Characteristics
Table 3. Receiver AC Electrical Characteristics
Table 4. Transmitter AC Electrical Characteristics
Table 5. Auxiliary Block Specifications
Table 6. Digital IO Specifications (SDO, SDI, SCLK, nSEL, and nIRQ) ................................... 13
Table 7. GPIO Specifications (GPIO_0, GPIO_1, and GPIO_2) .............................................. 13
Table 8. Absolute Maximum Ratings ........................................................................................ 14
Table 9. Operating Modes ........................................................................................................18
Table 10. Serial Interface Timing Parameters .......................................................................... 19
Table 11. Operating Modes ...................................................................................................... 21
Table 12. Frequency Band Selection ....................................................................................... 28
Table 13. RX Packet Handler Configuration ............................................................................45
Table 14. Packet Handler Registers ......................................................................................... 46
Table 15. Minimum Receiver Settling Time .............................................................................. 48
Table 16. RX Modem Configurations for FSK and GFSK ........................................................ 49
Table 17. Filter Bandwidth Parameters .................................................................................... 51
Table 18. Channel Filter Bandwidth Settings ........................................................................... 52
Table 19. ndec[2:0] Settings ..................................................................................................... 53
Table 20. RX Modem Configuration for OOK with Manchester Disabled ................................. 54
Table 21. RX Modem Configuration for OOK with Manchester Enabled ................................. 54
Table 22. POR Parameters ...................................................................................................... 55
Table 23. Temperature Sensor Range ..................................................................................... 60
Table 24. Antenna Diversity Control ......................................................................................... 67
Table 25. Split RF I/Os Bill of Materials .................................................................................... 70
Table 26. Recommended Crystal Parameters ......................................................................... 78
Table 27. RX Matching for Different Bands .............................................................................. 79
Table 28. Register Descriptions ............................................................................................... 81
Table 29. Interrupt or Status 1 Bit Set/Clear Description ......................................................... 86
Table 30. When are Individual Status Bits Set/Cleared if not Enabled as Interrupts? ............. 86
Table 31. Interrupt or Status 2 Bit Set/Clear Description ........................................................ 88
Table 32. Detailed Description of Status Registers when not Enabled as Interrupts ............... 88
Table 33. Internal Analog Signals Available on the Analog Test Bus .................................... 128
Table 34. Internal Digital Signals Available on the Digital Test Bus .......................................129
I S T OF
T
ABLES
1
Preliminary Rev. 0.4
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1
.....................................................................10
1
1
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Si4431
7

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