SI4431-A0-FM Silicon Laboratories Inc, SI4431-A0-FM Datasheet - Page 146
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SI4431-A0-FM
Manufacturer Part Number
SI4431-A0-FM
Description
IC TXRX ISM 930MHZ 3.6V 20-QFN
Manufacturer
Silicon Laboratories Inc
Specifications of SI4431-A0-FM
Package / Case
20-QFN
Mfg Application Notes
Transitioning SI4430/31 to Rev B
Frequency
240MHz ~ 930MHz
Data Rate - Maximum
128kbps
Modulation Or Protocol
FSK, GFSK, OOK
Power - Output
13dBm
Sensitivity
-118dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
18.5mA
Current - Transmitting
28mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Number Of Receivers
2
Number Of Transmitters
1
Wireless Frequency
240 MHz to 930 MHz
Output Power
13 dBm
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Maximum Supply Current
28 mA
Minimum Operating Temperature
- 40 C
Modulation
FSK, GFSK, OOK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Applications
-
Memory Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
336-1633-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SI4431-A0-FMR
Manufacturer:
SILICON
Quantity:
3 500
Part Number:
SI4431-A0-FMR
Manufacturer:
SILICONLABS/芯科
Quantity:
20 000
Register 6Dh. TX Power
Register 6Eh. TX Data Rate 1
Si4431
Reset value = xxxx1000
Reset value = 00001010
The data rate can be calculated as: TX_DR = 10
The data rate can be calculated as: TX_DR = 10
146
Name
Name
Type
Type
Bit
Bit
7:4
2:0
7:0
Bit
Bit
3
txpow[2:0]
Reserved
txdr[15:8]
lna_sw
Name
Name
D7
D7
Reserved.
LNA Switch Controller.
If set, lna_sw control from the digital will go high during TX modes, and low during other
times. If reset, the digital control signal is low at all times.
TX Output Power.
The output power is configurable from –8 dBm to +13 dBm in ~3 dBm steps.
txpow[2:0] = 111 corresponds to +13 dBm and 000 to –8 dBm.
Data Rate Upper Byte.
See formula above.
D6
D6
Reserved
R
D5
D5
Preliminary Rev. 0.4
3
3
x txdr[15:0] / 2
x txdr[15:0] / 2
D4
D4
txdr[15:8]
R/W
Function
Function
16
21
lna_sw
R/W
D3
D3
[kbps] (if address 70[5] = 0) or
[kbps] (if address 70[5] = 1)
D2
D2
txpow[2:0]
R/W
D1
D1
D0
D0