IPR-HPMCII Altera, IPR-HPMCII Datasheet - Page 13

• Manufacturer Part Number: IPR-HPMCII
• Description: IP CORE Renewal Of IP-HPMCII
• Manufacturer: Altera

Specifications of IPR-HPMCII

• Software Application: IP CORE, Memory Controllers, SDRAM
• Supported Families: Arria II GX, HardCopy III, Stratix III, Stratix IV
• Core Architecture: FPGA
• Core Sub-architecture: Arria, HardCopy, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: na

Chapter 1: About This IP
Resource Utilization
December 2010 Altera Corporation
High-Performance Controller
High-Performance Controller II
Table 1–6
ALTMEMPHY) for Stratix III and Stratix IV devices.
Table 1–6. Resource Utilization in Stratix III Devices
Table 1–7. Resource Utilization in Stratix IV Devices
Table 1–9
(including ALTMEMPHY) for Arria II GX, Stratix III, and Stratix IV devices.
Table 1–8. Resource Utilization in Arria II GX Devices
Table 1–9. Resource Utilization in Stratix III Devices
Local Data Width
Local Data Width
Local Data Width
Local Data Width
(Bits)
(Bits)
(Bits)
(Bits)
256
288
256
288
256
288
256
288
32
64
32
64
32
64
32
64
and
through
Table 1–7
Table 1–10
Memory Width
Memory Width
Memory Width
Memory Width
(Bits)
(Bits)
(Bits)
(Bits)
show the typical sizes for the DDR3 SDRAM HPC (including
16
64
72
16
64
72
16
64
72
16
64
72
8
8
8
8
show the typical sizes for the DDR3 SDRAM HPC II
Section II. DDR3 SDRAM Controller with ALTMEMPHY IP User Guide
Combinational
Combinational
Combinational
Combinational
ALUTs
ALUTs
ALUTs
ALUTs
1,891
1,966
2,349
2,442
1,924
1,987
2,359
2,449
2,516
2,604
3,121
3,243
2,430
2,499
2,902
3,001
External Memory Interface Handbook Volume 3
Dedicated Logic
Dedicated Logic
Dedicated Logic
Dedicated Logic
Registers
Registers
Registers
Registers
1,558
1,707
2,591
2,739
1,580
1,724
2,584
2,728
1,945
2,101
3,021
3,175
1,776
1,919
2,809
2,959
Memory
Memory
Memory
Memory
(M9K)
(M9K)
(M9K)
(M9K)
10
10
17
18
10
2
3
9
2
3
9
3
5
2
3
9
1–7