IPR-HPMCII Altera, IPR-HPMCII Datasheet - Page 162

• Manufacturer Part Number: IPR-HPMCII
• Description: IP CORE Renewal Of IP-HPMCII
• Manufacturer: Altera

Specifications of IPR-HPMCII

• Software Application: IP CORE, Memory Controllers, SDRAM
• Supported Families: Arria II GX, HardCopy III, Stratix III, Stratix IV
• Core Architecture: FPGA
• Core Sub-architecture: Arria, HardCopy, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: na

Figure 9–9. Half-Rate Write Operation for HPC II—Burst-Aligned Address
Half-Rate Write (Burst-Aligned Address)
Mem Command[2:0]
local_address[25:0]
afi_wdata_valid[1:0]
AFI Command[2:0]
local_wdata[31:0]
local_burstbegin
AFI Memory Interface
mem_addr[13:0]
afi_dqs_burst[0]
afi_dqs_burst[1]
local_write_req
afi_wdata[31:0]
local_size[4:0]
mem_cke[1:0]
afi_addr[27:0]
mem_cs_n[0]
mem_odt[1:0]
mem_ba[2:0]
mem_dq[7:0]
local_be[3:0]
Controller - AFI
afi_cs_n[3:0]
afi_wlat[4:0]
local_ready
afi_dm[3:0]
afi_ba[5:0]
mem_dqs
mem_dm
mem_clk
Local Interface
phy_clk
02
NOP
[1]
ACT
B
F
NOP
AABBCCDD
4001000
ACT
WR
B
EEFF0011
NOP
AABBCCDD
[2]
0000002
0000000
1000
F
NOP
WR
EEFF0011
0
3
AABBCCDD
0000004
4001000 0000000 4021008 0000000 4041010
EEFF0011
0000
B
WR
NOP
NOP
F
F
0
00
WR
B
1000
WR
AABBCCDD
NOP
F
[3]
0000
NOP
EEFF0011
00
WR
B
1008
WR
AABBCCDD
NOP
NOP
DD CC BB AA11 00 FF EE
0000
0
3
EEFF0011
[4]
1010
WR
AABBCCDD
DD CC BB AA11 00 FF EE
EEFF0011
[5]
[6]
DD CC BB AA11 00 FF EE
0000000