IPR-HPMCII Altera, IPR-HPMCII Datasheet - Page 9

• Manufacturer Part Number: IPR-HPMCII
• Description: IP CORE Renewal Of IP-HPMCII
• Manufacturer: Altera

Specifications of IPR-HPMCII

• Software Application: IP CORE, Memory Controllers, SDRAM
• Supported Families: Arria II GX, HardCopy III, Stratix III, Stratix IV
• Core Architecture: FPGA
• Core Sub-architecture: Arria, HardCopy, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: na

Chapter 1: About This IP
Features
Features
December 2010 Altera Corporation
Table 1–2
ALTMEMPHY IP to each of the Altera device families.
Table 1–2. Device Family Support
The ALTMEMPHY megafunction offers the following features:
■
■
■
■
■
■
The ALTMEMPHY megafunction supports DDR3 SDRAM DIMMs with leveling and
DDR3 SDRAM components without leveling:
■
■
■
Arria
HardCopy III
HardCopy IV E
HardCopy IV GX
Stratix
Stratix IV
Other device families
Simple setup.
Support for the Altera PHY Interface (AFI) for DDR3 SDRAM on all supported
devices.
Automated initial calibration eliminating complicated read data timing
calculations.
Voltage and temperature (VT) tracking that guarantees maximum stable
performance for DDR3 SDRAM interface.
Self-contained datapath that makes connection to an Altera controller or a
third-party controller independent of the critical timing paths.
Easy-to-use parameter editor.
ALTMEMPHY with leveling is for unbuffered DIMMs (including SODIMM and
MicroDIMM) or DDR3 SDRAM components up to 80-bit total data bus width with
a layout like a DIMM that target Stratix III and Stratix IV devices:
■
■
■
ALTMEMPHY supports DDR3 SDRAM components without leveling for
Arria II GX, Stratix III, and Stratix IV devices using T-topology for clock, address,
and command bus:
■
The DDR3 SDRAM PHY with leveling f
400 MHz for single chip selects.
®
®
II GX
Supports a fully-calibrated DDR3 SDRAM PHY for DDR3 SDRAM unbuffered
DIMM with ×4 and ×8 devices with 300-MHz to 533-MHz frequency targets.
Deskew circuitry is enabled automatically for interfaces higher than 400 MHz.
Supports single and multiple chip selects.
Supports multiple chip selects.
III
shows the level of support offered by the DDR3 SDRAM Controller with
Device Family
Section II. DDR3 SDRAM Controller with ALTMEMPHY IP User Guide
MAX
Preliminary
HardCopy Companion
HardCopy Companion
HardCopy Companion
Final
Final
No support
is 533 MHz; without leveling f
External Memory Interface Handbook Volume 3
Support
MAX
1–3
is