IPR-HPMCII Altera, IPR-HPMCII Datasheet - Page 166

• Manufacturer Part Number: IPR-HPMCII
• Description: IP CORE Renewal Of IP-HPMCII
• Manufacturer: Altera

Specifications of IPR-HPMCII

• Software Application: IP CORE, Memory Controllers, SDRAM
• Supported Families: Arria II GX, HardCopy III, Stratix III, Stratix IV
• Core Architecture: FPGA
• Core Sub-architecture: Arria, HardCopy, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: na

Figure 9–11. Half-Rate Write Operation for HPC II—Non Burst-Aligned Address
Half-Rate Write (Non Burst-Aligned Address)
Mem Command[2:0]
afi_wdata_valid[1:0]
local_address[25:0]
AFI Command[2:0]
local_wdata[31:0]
local_burstbegin
mem_addr[13:0]
afi_dqs_burst[0]
afi_dqs_burst[1]
local_write_req
afi_wdata[31:0]
local_size[4:0]
mem_cke[1:0]
afi_addr[27:0]
mem_odt[1:0]
AFI Memory Interface
mem_cs_n[0]
Local Interface
mem_ba[2:0]
mem_dq[7:0]
local_be[3:0]
afi_cs_n[3:0]
afi_wlat[4:0]
local_ready
Controller - AFI
afi_dm[3:0]
afi_ba[5:0]
mem_dqs
mem_dm
mem_clk
phy_clk
AABBCCDD EEFF0011 AABBCCDD
0000001
2
[1]
0000003
EEFF0011
[2]
0010004
B
WR
0000001
0000000
NOP
F
0000003
0020008
B
WR
[3]
0004
WR
0000005
0
3
AABBCCDD
0000000
NOP
0000
F
NOP
[5]
F
0
[6]
0008
WR
003000C
B
WR
0
3
DD CC BB AA
EEFF0011
0000000
NOP
[7]
0000
F
NOP
F
0
0040010
00
[4]
B
WR
11 00 FF EE
000C
WR
0
3
AABBCCDD
0000
NOP
F
0
00
0010
WR
0
3
0000000
NOP
DD CC BB AA
F
NOP
00
11 00 FF EE
0000