MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 1002
![MPU POWERQUICC III 783-PBGA](/photos/37/62/376266/mpc8544e_image_sml.jpg)
MPC8544VTALF
Manufacturer Part Number
MPC8544VTALF
Description
MPU POWERQUICC III 783-PBGA
Manufacturer
Freescale Semiconductor
Datasheets
1.MPC8544VTALF.pdf
(117 pages)
2.MPC8544VTALF.pdf
(2 pages)
3.MPC8544VTALF.pdf
(1340 pages)
Specifications of MPC8544VTALF
Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
667MHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
783-FCPBGA
Processor Series
MPC85xx
Core
e500
Data Bus Width
32 bit
Maximum Clock Frequency
667 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Data Ram Size
32 KB
I/o Voltage
1.8 V, 3.3 V
Interface Type
I2C, HSSI, DUART
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MPC8544VTALF
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MPC8544VTALFA
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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PCI Bus Interface
17.3.1.2.4
The PCI outbound window attributes registers (POWARn) define the window sizes to translate and other
attributes for the translations. The minimum window size is 4 Kbytes. The maximum window size is 16
Gbytes.
The default window attribute register, POWAR0, is shown in
POWARn registers are the same, only the reset values are different.
1
POWAR1–POWAR4 are shown in
Offset 0xC30, 0xC50, 0xC70, 0xC90
Reset
Table 17-10
17-18
Offset 0xC10
Reset 1
The default window is enabled, configured for memory read and memory write, and set to an OWS size of 4 Gbytes.
W
R
W
R E
12–15
Bits
–11
EN
0
0
N
0
0
1
1
Figure 17-10. PCI Outbound Window 1–4 Attributes Registers (POWAR1–POWAR4)
Name
RTT
describes the fields for the POWARn registers.
EN
0
—
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Figure 17-9. PCI Outbound Window 0 (Default) Attributes Register (POWAR0)
PCI Outbound Window Attributes Registers (POWAR n )
0
Enable. Enables this address translation
Reserved
Read transaction type to run on PCI
0000 Reserved
...
0011 Reserved
0100 Memory Read
0101 Reserved
...
0111 Reserved
1000 I/O Read
1001 Reserved
...
1111 Reserved
0
0
—
0
—
0
0
Table 17-10. POWAR n Field Descriptions
0
Figure
0
11 12
0
17-10.
11 12
0
1
RTT
RTT
0
All zeros
15 16
0
15 16
Description
0
WTT
1
Figure
WTT
0
19 20
0
19 20
17-9. Note that the fields for all of the
0
0
0
—
—
0
0
Freescale Semiconductor
25 26
0
25 26
0
Access: Read/Write
Access: Read/Write
1
OWS
1
OWS
1
1 1
31
31
1
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