MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 938

• Manufacturer Part Number: MPC8544VTALF
• Description: MPU POWERQUICC III 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8544VTALF

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 667MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 1.8 V, 3.3 V
• Interface Type: I2C, HSSI, DUART
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Enhanced Three-Speed Ethernet Controllers
15.7.1.8
SGMII mode initialization sequence is very similar to TBI mode initialization.
Interface
initialization sequence is shown in
15-206
Initialize SerDes to select SGMII. The initialization sequence should be prepended with SerDes initialization.
Mode.”Additional initialization is required for the SerDes. An example of SGMII mode
set source clock divide by 14 for example to insure that MDC clock speed is not greater than 2.5 MHz
SGMII Interface Support
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
RXDp/RXDn
TXDp/TXDn
Signals
Table 15-168. SGMII Interface Signal Configuration (4-Wire)
Frequency [MHz] 1250
MACSTNADDR2[0110_0000_0000_0010_0000_0000_0000_0000]
MACSTNADDR1[0100_0011_0110_0101_1000_0111_1000_1100]
Sum
Table 15-169. SGMII Mode Register Initialization Steps
(This example has Statistics Enable = 1, TBIM = 1, SGMIIM = 1)
Voltage [V] LVDS
SerDes Signals
MACCFG1[1000_0000_0000_0000_0000_0000_0000_0000]
MACCFG1[0000_0000_0000_0000_0000_0000_0000_0000]
MACCFG2[0000_0000_0000_0000_0111_0010_0000_0101]
ECNTRL[0000_0000_0000_0000_0001_0000_0010_0010]
MIIMCFG[0000_0000_0000_0000_000_0000_0000_0101]
TBIPA[0000_0000_0000_0000_0000_0000_0001_0000]
(Set I/F mode = 1 in SGMII 10/100 Mbps speed)
(Set R100M = 1 in SGMII 100 Mbps speed)
Table
I/O
O
I
Assign a Physical address to the TBI,
Setup the MII Mgmt clock speed,
to 02608C:876543, for example.
to 02608C:876543, for example.
(I/F Mode = 2, Full Duplex = 1)
Initialize MAC Station Address
Initialize MAC Station Address
15-169.
Signals
set to 16, for example.
No. of
Initialize MACCFG2,
Initialize ECNTRL,
Clear Soft_Reset,
2
2
4
Set Soft_Reset,
Signals
TXD
RXD
Frequency [MHz] 1250
Sum
Voltage [V] LVDS
SGMII Interface
I/O
O
I
Section 15.7.1.3, “TBI
Signals
No. of
2
2
4
Freescale Semiconductor