MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 294

MPU POWERQUICC III 783-PBGA

MPC8544VTALF

Manufacturer Part Number
MPC8544VTALF
Description
MPU POWERQUICC III 783-PBGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MPC8544VTALF

Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
667MHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
783-FCPBGA
Processor Series
MPC85xx
Core
e500
Data Bus Width
32 bit
Maximum Clock Frequency
667 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Data Ram Size
32 KB
I/o Voltage
1.8 V, 3.3 V
Interface Type
I2C, HSSI, DUART
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
MPC8544VTALF
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Part Number:
MPC8544VTALFA
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
L2 Look-Aside Cache/SRAM
Figure 7-23
Table 7-20
7-24
11–15
16–17
18–19
20–30
9–10
Bits
Offset 0x2_0E50
Reset
31
8
W
R
0
TRANSTYPE
0–31
TRANSSRC
Bits
VALINFO
BURST
describes L2ERRADDRH[L2ADDRH].
Name
shows the L2 error address capture register high (L2ERRADDRH).
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Figure 7-23. L2 Error Address Capture Register (L2ERRADDRH)
L2ADDRH
Burst transaction for detected error
0 Single-beat (≤ 64 bits) transaction
1 Burst transaction
Reserved
Transaction source for detected error
00000 External (system logic)
10000 Processor (instruction)
10001 Processor (data)
Reserved
Transaction type for detected error
00 Snoop (tag/status read)
01 Write
10 Read
11 Read-modify-write
Reserved
L2 capture registers valid
0 L2 capture registers contain no valid information or no enabled errors were detected.
1 L2 capture registers contain information of the first detected error which has reporting enabled.
Name
Software must clear this bit to unfreeze error capture so error detection hardware can overwrite
the capture address/data/attributes for a newly detected error.
Table 7-19. L2ERRATTR Field Descriptions (continued)
Table 7-20. L2ERRADDRH Field Description
L2 address bits 4–35 corresponding to detected error
L2ADDRH
All zeros
Description
Description
Freescale Semiconductor
Access: Read Only
31

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