MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 1216

• Manufacturer Part Number: MPC8544VTALF
• Description: MPU POWERQUICC III 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8544VTALF

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 667MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 1.8 V, 3.3 V
• Interface Type: I2C, HSSI, DUART
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Device Performance Monitor
A burst is counted at the end of a burst sequence when the three burst parameter counters are all equal to
zero.
20.4.7
Table 20-10
The event assignment column indicates the event’s type and number, using the following formats:
Counter events not specified in
20-16
•
•
Burst Granularity Counter
Figure 20-11
Burst Distance Counter
Ref:#—Reference events are shared across counters PMC1–PMC9. The number indicates the
event. For example, Ref:6 means that PMC1–PMC9 share reference event 6.
C[0–9]:#—Counter-specific events. C8 indicates an event assigned to PMC8. Thus C8:126 means
PMC8 is assigned event 126 (PIC interrupt wait cycles).
Burst Size Counter
PMLCB n [TBMULT]
PMLCB n [BGRAN]
PMLCB n [BDIST]
PMLCB n [BSIZE]
Performance Monitor Events
lists performance monitor events specified in PMLCA1–PMLC9.
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Events generated by peripherals attached to the on-chip network (DMA,
PCI, PCI Express) are counted twice, because these peripherals run at a
slower clock rate than peripherals connected directly to the peripheral bus
(for example, DDR or eTSEC).
Burst Count
shows a burstiness counting example.
1
5
1
0
Figure 20-11. Burstiness Counting Timing Diagram
4
1
1
5
For this example: count bursts of 5 event occurrences, burst granularity of 1, and
acceptable distance between bursts of 8 (product of TBMULT and BDIST).
1
(Multiply by 2)
0
Table 20-10
2
4
1
3
3
4
0
5
2
1
6
are reserved.
1
7
0 1
8
NOTE
0
9
10 11 12
8 7 6 5
13
14 15 16 17 18 19 20 21 22 23 24 25
4 3 2 1
0
5
0
4 3
Freescale Semiconductor
1
2
0
5 4
1
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