MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 962

• Manufacturer Part Number: MPC8544VTALF
• Description: MPU POWERQUICC III 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8544VTALF

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 667MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Data Ram Size: 32 KB
• I/o Voltage: 1.8 V, 3.3 V
• Interface Type: I2C, HSSI, DUART
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

DMA Controller
Table 16-14
Table 16-15
16-20
Offset 0x128
Reset
29–30
0–26
Offset 0x124
Bits
Reset
27
28
31
W
R
W
R
28–31
0–27
0x1A8
0x228
0x2A8
0
Bit
0x1A4
0x224
0x2A4
0
NDEOSIE Next descriptor end-of-segment interrupt enable
NLNDA
EOLND
Name
—
—
describes the fields of the NLNDARn registers.
describes the fields of the ENLNDARn registers.
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Figure 16-15. Extended Next Link Descriptor Address Registers (ENLNDAR n )
ENLNDA
Name
Next link descriptor address. Contains the next link descriptor address in memory. The descriptor must be
aligned to a 32-byte boundary.
Reserved
0 Do not generate an interrupt if the current DMA transfer for the current descriptor is finished.
1 Generate an interrupt if the current DMA transfer for the current descriptor is finished.
Reserved
End-of-links descriptor. This bit is ignored in direct mode.
0 This descriptor is not the last link descriptor in memory for this list.
1 This descriptor is the last link descriptor in memory for this list. If this bit is set, the DMA controller
—
Figure 16-14. Next Link Descriptor Address Registers (NLNDAR n )
advances to the next list descriptor in memory if NLSDAR n [EOLSD] is also set in extended mode.
Reserved
Next link descriptor extended address bits (upper 4 bits of 36-bit address)
Table 16-15. ENLNDAR n Field Descriptions
Table 16-14. NLNDAR n Field Descriptions
NLNDA
—
All zeros
All zeros
Description
Description
26
—
27
NDEOSIE
28
Freescale Semiconductor
Access: Read/Write
Access: Read/Write
29
27 28
—
30
ENLNDA
EOLND
31
31