MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 417

MPU POWERQUICC III 783-PBGA

MPC8544VTALF

Manufacturer Part Number
MPC8544VTALF
Description
MPU POWERQUICC III 783-PBGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MPC8544VTALF

Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
667MHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
783-FCPBGA
Processor Series
MPC85xx
Core
e500
Data Bus Width
32 bit
Maximum Clock Frequency
667 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Data Ram Size
32 KB
I/o Voltage
1.8 V, 3.3 V
Interface Type
I2C, HSSI, DUART
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC8544VTALF
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MPC8544VTALFA
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Table 10-9
10.3.1.2
The block revision register (BRR2) shown in
integration option and IP block configuration options.
Table 10-8
10.3.1.3
The feature reporting register (FRR) shown in
processor configurations. It also informs the programming environment of the controller version.
Freescale Semiconductor
16–23
24–31
16–23
24–31
0–15
8–15
Offset 0x4_0010
Offset 0x4_1000
Bits
Reset 0
Bits
0–7
Reset
W
W
R
R
0
0
0
Name
IPMN The Minor Revision of IP block
IPMJ
IPCFGO
IPID
IPINTO
Name
describes the BRR1 fields.
0
describes the BRR2 fields.
0
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
0
0
Block Revision Register 2 (BRR2)
Feature Reporting Register (FRR)
IP block ID
The Major Revision of IP block
0
0
Reserved.
IP block integration options
Reserved.
IP block configuration options
0
0
4
0
0
5
0
0
0
0
7
Figure 10-4. Block Revision Register 2 (BRR2)
Figure 10-5. Feature Reporting Register (FRR)
8
0
0
Table 10-7. BRR1 Field Descriptions
Table 10-8. BRR2 Field Descriptions
0
1
NIRQ
0
0
IPINTO
0
0
0
1
Figure 10-5
0
1
Figure 10-4
0
1
15 16
15 16
0
1
Description
Description
0
0
provides information about interrupt and
0
0
provides information about the IP block
18 19
0
0
0
0
0
0
NCPU
0
0
0
0
Programmable Interrupt Controller
23 24
23 24
0
0
0
0
0
0
0
0
Access: Read only
Access: Read only
IPCFGO
0
0
VID
0
0
0
0
0
1
10-19
31
31
1
0

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