UPD78F0078GK-9ET-A Renesas Electronics America, UPD78F0078GK-9ET-A Datasheet - Page 131

• Manufacturer Part Number: UPD78F0078GK-9ET-A
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0078GK-9ET-A

• Lead Free Status / Rohs Status: Supplier Unconfirmed

7.3 Clock Generator Control Registers
(1) Processor clock control register (PCC)
The clock generator is controlled by the following two registers.
Note The feedback resistor is required to control the bias point of the oscillation waveform so that the bias point
PCC selects the CPU clock and the division ratio, sets main system clock oscillator operation/stop and sets
whether to use the subsystem clock oscillator internal feedback resistor
PCC is set by a 1-bit or 8-bit memory manipulation instruction.
RESET input sets PCC to 04H.
• Processor clock control register (PCC)
• Oscillation stabilization time select register (OSTS)
is in the middle of the power supply voltage.
When the subsystem clock is not used, the power consumption in the STOP mode can be reduced by setting
bit 6 (FRC) of PCC to 1 (refer to Figure 7-7 Subsystem Clock Feedback Resistor).
CHAPTER 7 CLOCK GENERATOR
User’s Manual U14260EJ4V0UD
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