UPD78F0078GK-9ET-A Renesas Electronics America, UPD78F0078GK-9ET-A Datasheet - Page 256

• Manufacturer Part Number: UPD78F0078GK-9ET-A
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0078GK-9ET-A

• Lead Free Status / Rohs Status: Supplier Unconfirmed

(4) Port mode register 2 (PM2)
254
Address: FF22H After reset: FFH
Port mode register 2 is used to set input/output of port 2 in 1-bit units.
To use the P24/TxD0 pin as a serial data output, set PM24 and the output latch of P24 to 0.
To use the P23/RxD0 pin as a serial data input, and the P25/ASCK0 pin as a clock input, set PM23 and PM25
to 1. At this time, the output latches of P23 and P25 can be either 0 or 1.
PM2 is set by a 1-bit or 8-bit memory manipulation instruction.
RESET input sets PM2 to FFH.
Symbol
PM2
PM2n
7
1
0
1
Output mode (output buffer on)
Input mode (output buffer off)
Figure 14-6. Format of Port Mode Register 2 (PM2)
6
1
CHAPTER 14 SERIAL INTERFACE UART0
R/W
PM25
5
User’s Manual U14260EJ4V0UD
I/O mode selection of P2n pin (n = 0 to 5)
PM24
4
PM23
3
PM22
2
PM21
1
PM20
0