UPD78F0078GK-9ET-A Renesas Electronics America, UPD78F0078GK-9ET-A Datasheet - Page 367

• Manufacturer Part Number: UPD78F0078GK-9ET-A
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0078GK-9ET-A

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Transfer slave address.
IIC0
Issue stop condition.
Issue start condition.
Clear INTIIC0.
CHAPTER 18 SERIAL INTERFACE IIC0 ( PD780078Y SUBSERIES ONLY)
INTIIC0 = 1?
ACKD0 = 1?
SPD0 = 1?
STD0 = 1?
Reception
SPT0 = 1
STT0 = 1
address, R/W (1)
END
C
D
Yes
Yes
Yes
Yes
Figure 18-21. Master Operation Flowchart (4/5)
End (no acknowledgment)
No
No
No
No
User’s Manual U14260EJ4V0UD
When transmission is completed, issue the
stop condition to notify the slave of
completion of transmission.
For reception, the data transfer direction
must be changed. Issue the start condition
again and redo (restart) communication.
Because the master receives data this time,
set the R/W bit to 1 and transmit an
address.
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