UPD78F0078GK-9ET-A Renesas Electronics America, UPD78F0078GK-9ET-A Datasheet - Page 165

• Manufacturer Part Number: UPD78F0078GK-9ET-A
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0078GK-9ET-A

• Lead Free Status / Rohs Status: Supplier Unconfirmed

8.4.3 Pulse width measurement operations
16-bit timer counter 0n (TM0n).
restarting the timer in synchronization with the edge of the signal input to the TI00n pin.
the necessary pulse width. Clear the overflow flag after checking it.
by prescaler mode register 0n (PRM0n) and the valid level of the TI00n or TI01n pin is detected twice, thus eliminating
noise with a short pulse width.
It is possible to measure the pulse width of the signals input to the TI00n pin and TI01n pin using
There are two measurement methods: measuring with TM0n used in free-running mode, and measuring by
When an interrupt occurs, read the valid value of the capture register, check the overflow flag, and then calculate
The capture operation is not performed until the signal pulse width is sampled in the count clock cycle selected
The basic operation setting procedure is as follows.
<1> Set the CRC0n register (see Figures 8-23, 8-26, 8-28, and 8-30 for the set value).
<2> Set the count clock by using the PRM0n register.
<3> Set the TMC0n register to start the operation (see Figures 8-23, 8-26, 8-28, and 8-30 for the set value).
Caution
Remarks 1. For the setting of the TI00n (or TI01n) pin, see 8.3 (5) Port mode register 7 (PM7).
Setting
Rising edge detection
2. For how to enable the INTTM00n (or INTTM01n) interrupt, see CHAPTER 19 INTERRUPT
3. n = 0, 1
To use two capture registers, set the TI00n and TI01n pins.
Count clock
FUNCTIONS.
INTTM01n
CR01n
Figure 8-22. CR01n Capture Operation with Rising Edge Specified
TM0n
TI00n
CHAPTER 8 16-BIT TIMER/EVENT COUNTERS 00, 01
N
3
User’s Manual U14260EJ4V0UD
N
2
N
1
N
N
N + 1
163