UPD78F0078GK-9ET-A Renesas Electronics America, UPD78F0078GK-9ET-A Datasheet - Page 366

• Manufacturer Part Number: UPD78F0078GK-9ET-A
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0078GK-9ET-A

• Lead Free Status / Rohs Status: Supplier Unconfirmed

364
No
Transmit write data.
Prepare write data.
Transmission?
Clear INTIIC0.
Clear
Transfer end?
INTIIC0 = 1?
INTIIC0 = 1?
ACKD0 = 1?
ACKD0 = 1?
IIC0
TRC0 = 1?
CHAPTER 18 SERIAL INTERFACE IIC0 ( PD780078Y SUBSERIES ONLY)
INTIIC0.
C
B
Data
Yes
Yes
Yes
Yes
Yes
Yes
End (no acknowledgment)
Figure 18-21. Master Operation Flowchart (3/5)
No
No
No
No
Reception
User’s Manual U14260EJ4V0UD
Set error flag.
End
When writing data to EEPROM, continue
writing data.
When reading data from EEPROM, start
reception processing.
Prepare data to be written to EEPROM, and
transmit it to EEPROM.
Each time data has been transmitted, the
slave returns ACK. If any error occurs
before transmission of the necessary data is
completed, ACK may not be returned. In
this case, end transfer.
In the case of an error, set the error flag as
shown on the left, and release the bus.