UPD78F0078GK-9ET-A Renesas Electronics America, UPD78F0078GK-9ET-A Datasheet - Page 175

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UPD78F0078GK-9ET-A

Manufacturer Part Number
UPD78F0078GK-9ET-A
Description
Manufacturer
Renesas Electronics America
Datasheet

Specifications of UPD78F0078GK-9ET-A

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8.4.5 PPG output operation
in Figure 8-34 allows operation as PPG (Programmable Pulse Generator) output.
correspond to the count values set beforehand in 16-bit timer capture/compare register 01n (CR01n) and in 16-bit
timer capture/compare register 00n (CR00n), respectively.
Setting 16-bit timer mode control register 0n (TMC0n) and capture/compare control register 0n (CRC0n) as shown
The basic operation setting procedure is as follows.
<1> Set the CRC0n register (see Figure 8-34 for the set value).
<2> Set any value to the CR00n register as the cycle.
<3> Set any value to the CR01n register as the duty factor.
<4> Set the TOC0n register (see Figure 8-34 for the set value).
<5> Set the count clock by using the PRM0n register.
<6> Set the TMC0n register to start the operation (see Figure 8-34 for the set value).
Remarks 1. For the setting of the TO0n pin, see 8.3 (5) Port mode register 7 (PM7).
In the PPG output operation, square waves are output from the TO0n pin with the pulse width and the cycle that
Remark n = 0, 1
Setting
2. For how to enable the INTTM00n interrupt, see CHAPTER 19 INTERRUPT FUNCTIONS.
CHAPTER 8 16-BIT TIMER/EVENT COUNTERS 00, 01
User’s Manual U14260EJ4V0UD
173

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