UPD78F0078GK-9ET-A Renesas Electronics America, UPD78F0078GK-9ET-A Datasheet - Page 247

• Manufacturer Part Number: UPD78F0078GK-9ET-A
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0078GK-9ET-A

• Lead Free Status / Rohs Status: Supplier Unconfirmed

(13) A/D converter sampling time and A/D conversion start delay time
Notes 1. Set the A/D conversion time as follows.
Remark f
Other than above
FR02
The sampling time of the A/D converter varies depending on the values set in A/D converter mode register 0
(ADM0). There is a delay time from when the A/D converter is enabled for operation until sampling is actually
performed.
For the sets in which a strict A/D conversion time is required, note the contents described in Figure 13-20 and
Table 13-3.
0
0
0
1
1
1
Sampling timing
2. Expanded-specification products of PD780078 Subseries only.
f
• When operated at f
• When operated at f
X
CPU
:
Table 13-3. Sampling Time and A/D Conversion Start Delay Time of A/D Converter
INTAD0
FR01
Figure 13-20. Timing of A/D Converter Sampling and A/D Conversion Start Delay
ADCS0
: CPU clock frequency
0
0
1
0
0
1
Main system clock oscillation frequency
ADCS0
FR00
0
1
0
0
1
0
conversion
start delay
1, external trigger, or ADS0 rewrite
A/D
time
Conversion Time
X
X
Setting prohibited
144/f
120/f
96/f
72/f
60/f
48/f
= 12 MHz
= 8.38 MHz (V
X
X
X
X
X
X
Sampling
CHAPTER 13 A/D CONVERTER
time
Note 2
User’s Manual U14260EJ4V0UD
Note 1
DD
(V
= 4.0 to 5.5 V):
DD
Conversion time
20/f
16/f
12/f
10/f
8/f
6/f
= 4.5 to 5.5 V): 12 s or more
Sampling Time
X
X
X
X
X
X
14 s or more
0.5/f
0.5/f
CPU
CPU
A/D Conversion Start Delay Time
MIN.
+ 6/f
+ 3/f
X
X
Sampling
Conversion time
time
0.5/f
0.5/f
CPU
CPU
MAX.
+ 8/f
+ 4/f
X
X
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