UPD78F0078GK-9ET-A Renesas Electronics America, UPD78F0078GK-9ET-A Datasheet - Page 166

• Manufacturer Part Number: UPD78F0078GK-9ET-A
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0078GK-9ET-A

• Lead Free Status / Rohs Status: Supplier Unconfirmed

(1) Pulse width measurement with free-running counter and one capture register
164
Remark 0/1: Setting 0 or 1 allows another function to be used simultaneously with pulse width measurement.
When 16-bit timer counter 0n (TM0n) is operated in free-running mode, and the edge specified by prescaler mode
register 0n (PRM0n) is input to the TI00n pin, the value of TM0n is taken into 16-bit timer capture/compare register
01n (CR01n) and an external interrupt request signal (INTTM01n) is set.
The both falling and rising edges can be specified by bits 4 and 5 (ES00n and ES01n) of PRM0n as edges of
the TI00n pin.
Sampling is performed with the count clock selected by PRM0n, and a capture operation is only performed when
a valid level of the TI00n pin is detected twice, thus eliminating noise with a short pulse width.
Figure 8-23. Control Register Settings for Pulse Width Measurement with Free-Running Counter
PRM0n
TMC0n
CRC0n
n = 0, 1
ES11n
0/1
7
0
7
0
See the description of the respective control registers for details.
and One Capture Register (When TI00n and CR01n Are Used)
ES10n
0/1
6
0
6
0
ES01n
5
0
1
5
0
CHAPTER 8 16-BIT TIMER/EVENT COUNTERS 00, 01
(a) 16-bit timer mode control register 0n (TMC0n)
(b) Capture/compare control register 0n (CRC0n)
ES00n
4
0
1
4
0
(c) Prescaler mode register 0n (PRM0n)
TMC0n3
0
3
0
3
0
User’s Manual U14260EJ4V0UD
TMC0n2
CRC02n
2
0
1
1
PRM01n
CRC01n
0/1
0/1
1
0
OVF0n
PRM00n
CRC00n
0/1
0
0
Free-running mode
Selects count clock (setting “11” is prohibited).
Specifies both edges for pulse width detection.
Setting invalid (setting “10” is prohibited.)
CR00n used as compare register
CR01n used as capture register