UPD78F0078GK-9ET-A Renesas Electronics America, UPD78F0078GK-9ET-A Datasheet - Page 345

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UPD78F0078GK-9ET-A

Manufacturer Part Number
UPD78F0078GK-9ET-A
Description
Manufacturer
Renesas Electronics America
Datasheet

Specifications of UPD78F0078GK-9ET-A

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(2) IIC status register 0 (IICS0)
Address: FFA9H After reset: 00H
Symbol
IICS0
Note This register is also cleared when a bit manipulation instruction is executed for bits other than IICS0.
This register indicates the status of I
IICS0 is read by a 1-bit or 8-bit memory manipulation instruction.
RESET input clears IICS0 to 00H.
Remark LREL0: Bit 6 of IIC control register 0 (IICC0)
Condition for clearing (MSTS0 = 0)
• When a stop condition is detected
• When ALD0 = 1 (arbitration loss)
• Cleared by LREL0 = 1 (exit from communications)
• When IICE0 changes from 1 to 0 (operation stop)
• When RESET is input
Condition for clearing (ALD0 = 0)
• Automatically cleared after IICS0 is read
• When IICE0 changes from 1 to 0 (operation stop)
• When RESET is input
Condition for clearing (EXC0 = 0)
• When a start condition is detected
• When a stop condition is detected
• Cleared by LREL0 = 1 (exit from communications)
• When IICE0 changes from 1 to 0 (operation stop)
• When RESET is input
MSTS0
MSTS0
ALD0
EXC0
7
0
1
0
1
0
1
IICE0:
CHAPTER 18 SERIAL INTERFACE IIC0 ( PD780078Y SUBSERIES ONLY)
Slave device status or communication standby status
Master device communication status
This status means either that there was no arbitration or that the arbitration result was a “win”.
This status indicates the arbitration result was a “loss”. MSTS0 is cleared.
Extension code was not received.
Extension code was received.
Bit 7 of IIC control register 0 (IICC0)
ALD0
6
Figure 18-6. Format of IIC Status Register 0 (IICS0) (1/3)
R
EXC0
5
2
C.
User’s Manual U14260EJ4V0UD
COI0
Note
4
Detection of extension code reception
Detection of arbitration loss
Master device status
TRC0
3
Condition for setting (MSTS0 = 1)
• When a start condition is generated
Condition for setting (ALD0 = 1)
• When the arbitration result is a “loss”.
Condition for setting (EXC0 = 1)
• When the higher 4 bits of the received
address data are either “0000” or “1111”
(set at the rising edge of the eighth clock).
ACKD0
2
STD0
1
SPD0
0
343

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