UPD78F0078GK-9ET-A Renesas Electronics America, UPD78F0078GK-9ET-A Datasheet - Page 289

• Manufacturer Part Number: UPD78F0078GK-9ET-A
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0078GK-9ET-A

• Lead Free Status / Rohs Status: Supplier Unconfirmed

1. Character bit: 8 bits, Parity bit: Even parity, Stop bit: 1 bit, Communication data: 55H
2. Character bit: 7 bits, Parity bit: Odd parity, Stop bit: 2 bits, Communication data: 36H
3. Character bit: 8 bits, Parity bit: None, Stop bit: 1 bit, Communication data: 87H
Baud rate generator control register 2 (BRGC2) and clock select register 2 (CKSEL2) are used to set the
serial transfer rate.
If a receive error occurs, information about the receive error can be ascertained by reading asynchronous
serial interface status register 2 (ASIS2).
Start
Start
Start
D0
Figure 15-12. Example of UART Transmit/Receive Data Waveform
D0
D0
D1
D1
D1
CHAPTER 15 SERIAL INTERFACE UART2
D2
D2
D2
User’s Manual U14260EJ4V0UD
D3
1 data frame
D3
1 data frame
D3
1 data frame
D4
D4
D4
D5
D5
D5
D6
D6
D6
D7
Parity
D7
Parity
Stop
Stop
Stop
Stop
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