UPD78F0078GK-9ET-A Renesas Electronics America, UPD78F0078GK-9ET-A Datasheet - Page 591

• Manufacturer Part Number: UPD78F0078GK-9ET-A
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0078GK-9ET-A

• Lead Free Status / Rohs Status: Supplier Unconfirmed

E.2 Revision History up to Previous Edition
2nd
Edition
The history of revisions made up to this edition is shown below.
Addition of the following package
Addition of expanded-specification products to the PD780078 Subseries
Addition of 1.1 Expanded-Specification Products and Conventional Products
Modification of voltage operation range of A/D converter in 1.8 Outline of
Functions
Modification of voltage operation range of A/D converter in 2.7 Outline of
Functions
Addition of description about pin processing in 3.2.17 V
only)
Modification of I/O circuit types of P32 and P33 in Table 3-1 Pin I/O Circuit
Types
Addition of description about pin processing in 4.2.17 V
only)
Addition of description about programming area in 5.1.2 (1) Internal high-speed
RAM and (2) Internal expansion RAM
Modification of Figure 5-10 Data to Be Saved to Stack Memory and Figure 5-11
Data to Be Restored from Stack Memory
Modification of [Description example] in 5.4.4 Short direct addressing
Addition of [Illustration] in 5.4.7 Based addressing, 5.4.8 Based indexed
addressing, and 5.4.9 Stack addressing
Modification of port block diagrams (Figure 6-2 Block Diagram of P00 to P03 to
Figure 6-21 Block Diagram of P80)
Addition of Table 6-6 Port Mode Registers and Output Latch Setting When
Alternate Function Is Used
Addition of description of internal feedback resistor and oscillation stabilization
time select register (OSTS) in 7.3 Clock Generator Control Register
Deletion of 8.5.6 One-shot pulse output operation in the previous edition
Modification of Figure 8-1 Block Diagram of 16-Bit Timer/Event Counter 00
and Figure 8-2 Block Diagram of 16-Bit Timer/Event Counter 01
Change of Table 8-2 TI00n Pin Valid Edge and CR00n, CR01n Capture Trigger
and Table 8-3 TI01n Pin Valid Edge and CR00n Capture Trigger in the
previous edition to Table 8-2 CR00n Capture Trigger and Valid Edges of TI00n
and TI01n Pins and Table 8-3 CR01n Capture Trigger and Valid Edge of TI00n
Pin (CRC02n = 1)
Change of explanation order of each function in 8.4 Operation of 16-Bit Timer/
Event Counters 00, 01
Addition of Figure 8-31 PPG Output Configuration Diagram and Figure 8-32
PPG Output Operation Timing
64-pin plastic LQFP (GC-8BS type)
APPENDIX E REVISION HISTORY
Contents
User’s Manual U14260EJ4V0UD
PP
PP
(flash memory version
(flash memory version
Throughout
CHAPTER 1 OUTLINE
( PD780078 SUBSERIES)
CHAPTER 2 OUTLINE
( PD780078Y
SUBSERIES)
CHAPTER 3 PIN
FUNCTION ( PD780078
SUBSERIES)
CHAPTER 4 PIN
FUNCTION ( PD780078Y
SUBSERIES)
CHAPTER 5 CPU
ARCHITECTURE
CHAPTER 6 PORT
FUNCTIONS
CHAPTER 7 CLOCK
GENERATOR
CHAPTER 8 16-BIT
TIMER/EVENT
COUNTERS 00, 01
Applied to:
(1/7)
589