UPD78F0078GK-9ET-A Renesas Electronics America, UPD78F0078GK-9ET-A Datasheet - Page 148

• Manufacturer Part Number: UPD78F0078GK-9ET-A
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0078GK-9ET-A

• Lead Free Status / Rohs Status: Supplier Unconfirmed

146
Cautions 1. Set CR00n to a value other than 0000H in the clear & start mode entered on a match between
Remarks 1. Setting ES01n, ES00n = 1, 0 and ES11n, ES10n = 1, 0 is prohibited.
Falling edge
Rising edge
No capture operation
Falling edge
Rising edge
Both rising and falling edges
(1) TI00n pin valid edge selected as capture trigger (CRC01n = 1, CRC00n = 1)
(2) TI01n pin valid edge selected as capture trigger (CRC01n = 0, CRC00n = 1)
CR00n Capture Trigger
CR00n Capture Trigger
2. If the new value of CR00n is less than the value of 16-bit timer counter 0n (TM0n), TM0n
3. When the valid edge of the TI000 pin is used, P70 cannot be used as the timer output (TO00)
4. When the valid edge of the TI001 pin is used, P75 cannot be used as the timer output (TO01)
5. When CR00n is used as a capture register, read data is undefined if the register read time
Table 8-2. CR00n Capture Trigger and Valid Edges of TI00n and TI01n Pins
2. ES01n, ES00n:
3. n = 0, 1
TM0n and CR00n. However, in the free-running mode and in the clear & start mode using
the valid edge of the TI00n pin, if CR00n is set to 0000H, an interrupt request (INTTM00n)
is generated when CR00n changes from 0000H to 0001H following overflow (FFFFH).
continues counting, overflows, and then starts counting from 0 again. If the new value of
CR00n is less than the old value, therefore, the timer must be reset to be restarted after the
value of CR00n is changed.
pin. Moreover, when the TO00 pin is used, the valid edge of the TI000 pin cannot be used.
pin. Moreover, when the TO01 pin is used, the valid edge of the TI001 pin cannot be used.
and capture trigger input conflict (the capture data itself is the correct value). If count stop
of the timer and capture trigger input conflict, the captured data is undefined.
ES11n, ES10n:
CRC01n, CRC00n: Bits 1 and 0 of capture/compare control register 0n (CRC0n)
CHAPTER 8 16-BIT TIMER/EVENT COUNTERS 00, 01
Bits 5 and 4 of prescaler mode register 0n (PRM0n)
Bits 7 and 6 of prescaler mode register 0n (PRM0n)
Rising edge
Falling edge
Both rising and falling edges
Falling edge
Rising edge
Both rising and falling edges
User’s Manual U14260EJ4V0UD
TI00n Pin Valid Edge
TI01n Pin Valid Edge
ES01n
ES11n
0
0
1
0
0
1
ES00n
ES10n
0
1
0
1
1
1