UPD78F0078GK-9ET-A Renesas Electronics America, UPD78F0078GK-9ET-A Datasheet - Page 94

• Manufacturer Part Number: UPD78F0078GK-9ET-A
• Manufacturer: Renesas Electronics America

Specifications of UPD78F0078GK-9ET-A

• Lead Free Status / Rohs Status: Supplier Unconfirmed

92
5.4.8 Based indexed addressing
[Function]
[Operand format]
[Description example]
[Illustration]
The B or C register contents specified in an instruction are added to the contents of the base register, that is,
the HL register pair in an instruction word of the register bank specified by the register bank select flags (RBS0
and RBS1) and the sum is used to address the memory. Addition is performed by expanding the B or C register
contents as a positive number to 16 bits. A carry from the 16th bit is ignored. This addressing can be carried
out for all the memory spaces.
In the case of MOV A, [HL + B] (selecting the B register)
HL
The contents of the
addressed memory
is transferred.
A
Identifier
16
7
—
Operation code
[HL + B], [HL + C]
H
CHAPTER 5 CPU ARCHITECTURE
User’s Manual U14260EJ4V0UD
8 7
0
+
7
7
Description
1 0 1 0 1 0 1 1
Memory
B
L
0
0
0