UPD78F0078GK-9ET-A Renesas Electronics America, UPD78F0078GK-9ET-A Datasheet - Page 147

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UPD78F0078GK-9ET-A

Manufacturer Part Number
UPD78F0078GK-9ET-A
Description
Manufacturer
Renesas Electronics America
Datasheet

Specifications of UPD78F0078GK-9ET-A

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(1) 16-bit timer counter 0n (TM0n)
(2) 16-bit timer capture/compare register 00n (CR00n)
<1> At RESET input
<2> If TMC0n3 and TMC0n2 are cleared
<3> If the valid edge of TI00n is input in the clear & start mode entered by inputting the valid edge of TI00n
<4> If TM0n and CR00n match in the clear & start mode entered on a match between TM0n and CR00n
TM0n is a 16-bit read-only register that counts count pulses.
The counter is incremented in synchronization with the rising edge of the count clock. If the count value is read
during operation, input of the count clock is temporarily stopped, and the count value at that point is read.
The count value is reset to 0000H in the following cases.
CR00n is a 16-bit register which has the functions of both a capture register and a compare register. Whether
it is used as a capture register or as a compare register is set by bit 0 (CRC00n) of capture/compare control register
0n (CRC0n).
CR00n is set by a 16-bit memory manipulation instruction.
RESET input clears CR00n to 0000H.
• When CR00n is used as a compare register
• When CR00n is used as a capture register
The value set in CR00n is constantly compared with the 16-bit timer/counter 0n (TM0n) count value, and an
interrupt request (INTTM00n) is generated if they match. It can also be used as the register that holds the
interval time when TM0n is set to interval timer operation.
It is possible to select the valid edge of the TI00n pin or the TI01n pin as the capture trigger. Setting of the TI00n
or TI01n valid edge is performed by means of prescaler mode register 0n (PRM0n) (refer to Table 8-2).
(n = 0, 1)
(n = 0, 1)
Address: FF0AH, FF0BH (CR000), FF68H, FF69H (CR001)
Symbol
Address: FF0EH, FF0FH (TM00), FF6CH, FF6DH (TM01)
Symbol
CR00n
TM0n
Figure 8-4. Format of 16-Bit Timer Capture/Compare Register 00n (CR00n)
Figure 8-3. Format of 16-Bit Timer Counter 0n (TM0n)
CHAPTER 8 16-BIT TIMER/EVENT COUNTERS 00, 01
FF0BH (CR000)
FF69H (CR001)
FF6DH (TM01)
FF0FH (TM00)
User’s Manual U14260EJ4V0UD
After reset: 0000H
After reset: 0000H
FF0AH (CR000)
FF68H (CR001)
FF0EH (TM00)
FF6CH (TM01)
R
R/W
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