PEB 20542 F V1.3 Infineon Technologies, PEB 20542 F V1.3 Datasheet - Page 139

• Manufacturer Part Number: PEB 20542 F V1.3
• Description: IC CTRLR DMA SERIAL 2-CH TQFP144
• Manufacturer: Infineon Technologies
• Series: SEROCCO™r

Specifications of PEB 20542 F V1.3

• Function: Serial Optimized Communications Controller
• Interface: HDLC, PPP
• Number Of Circuits: 2
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 50mA
• Power (watts): 150mW
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 144-LFQFP
• Includes: Bit Processor Functions, Serial Communication Controllers (SCCs)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEB20542FV1.3X; SP000007633

Data Sheet
Register 10
CPU Accessibility:
Reset Value:
Offset Address:
typical usage:
TMODEB
RMODEB
TMODEA
RMODEA
Bit
7
0
Transmit DMA Mode Channel B
Receive DMA Mode Channel B
Transmit DMA Mode Channel A
Receive DMA Mode Channel A
These bits select the operating mode of the corresponding DMA
channel:
’0’
’1’
TMODEB
DMODE
DMA Mode Register
6
read/write
00
0D
written by CPU, evaluated by SEROCCO-D
H
H
Single Buffer Mode (standard mode)
Used base address registers are TBADDR1L/M/H
(transmit) and RBADDR1L/M/H (receive).
Switched Buffer Mode
Base address registers switch alternating from
TBADDR1L/M/H and RBADDR1L/M/H
TBADDR2L/M/H and RBADDR2L/M/H.
After reset, transmit and receive buffers #1 are selected.
5
0
DMA Controller Operation Mode
RMODEB
5-139
4
3
0
Register Description (DMODE)
TMODEA
2
1
0
to
PEB 20542
PEF 20542
2000-09-14
RMODEA
0