PEB 20542 F V1.3 Infineon Technologies, PEB 20542 F V1.3 Datasheet - Page 295
PEB 20542 F V1.3
Manufacturer Part Number
PEB 20542 F V1.3
Description
IC CTRLR DMA SERIAL 2-CH TQFP144
Manufacturer
Infineon Technologies
Series
SEROCCO™r
Datasheet
1.PEB_20542_F_V1.3.pdf
(300 pages)
Specifications of PEB 20542 F V1.3
Function
Serial Optimized Communications Controller
Interface
HDLC, PPP
Number Of Circuits
2
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
50mA
Power (watts)
150mW
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
144-LFQFP
Includes
Bit Processor Functions, Serial Communication Controllers (SCCs)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEB20542FV1.3X
SP000007633
SP000007633
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8
8.1
In the SEROCCO-D a Test Access Port (TAP) controller is implemented. The essential
part of the TAP is a finite state machine (16 states) controlling the different operational
modes of the boundary scan. Both, TAP controller and boundary scan, meet the
requirements given by the JTAG standard: IEEE 1149.1.
about the TAP controller.
Figure 88
If no boundary scan operation is planned TRST has to be connected with V
and TDI do not need to be connected since pull-up transistors ensure high input levels
in this case. Nevertheless it would be a good practice to put these unused inputs to
defined levels, using pull-up resistors.
Test handling (boundary scan operation) is performed via the pins TCK (Test Clock),
TMS (Test Mode Select), TDI (Test Data Input) and TDO (Test Data Output) when the
TAP controller is not in its reset state, i.e. TRST is connected to V
unconnected due to its internal pull-up. Test data at TDI are loaded with a 4-MHz clock
Data Sheet
TCK
TRST
TMS
TDI
TDO
Test Modes
JTAG Boundary Scan Interface
Block Diagram of Test Access Port and Boundary Scan Unit
CLOCK
Reset
Test
Control
Data in
Enable
Data out
Test Access Port (TAP)
- Finite State Machine
- Instruction Register (3 bit)
- Test Signal Generator
Clock Generation
TAP Controller
CLOCK
295
Figure 88
ID Data out
Control
Bus
SS Data
out
6
gives an overview
DD
SS
or it remains
PEB 20542
2
1
n
PEF 20542
Test Modes
. TMS, TCK
Pins
.
.
.
.
.
.
2000-09-14
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