PEB 20542 F V1.3 Infineon Technologies, PEB 20542 F V1.3 Datasheet - Page 198

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PEB 20542 F V1.3

Manufacturer Part Number
PEB 20542 F V1.3
Description
IC CTRLR DMA SERIAL 2-CH TQFP144
Manufacturer
Infineon Technologies
Series
SEROCCO™r
Datasheet

Specifications of PEB 20542 F V1.3

Function
Serial Optimized Communications Controller
Interface
HDLC, PPP
Number Of Circuits
2
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
50mA
Power (watts)
150mW
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
144-LFQFP
Includes
Bit Processor Functions, Serial Communication Controllers (SCCs)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEB20542FV1.3X
SP000007633
PEB 20542
PEF 20542
Register Description (PCMRX3)
PCMRX
PCM Mask for Receive Direction
(all mode)
This bit field is valid in clock mode 5 only and the PCM mask must be
enabled via bit ’REPCM’ in register RTSA1.
Each bit selects one of 32 (8-bit) receive time-slots. The offset of time-
slot zero to the frame sync pulse can be programmed via register
RTSA1
bit field ’RTSN’.
Data Sheet
5-198
2000-09-14

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