PEB 20542 F V1.3 Infineon Technologies, PEB 20542 F V1.3 Datasheet - Page 56

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PEB 20542 F V1.3

Manufacturer Part Number
PEB 20542 F V1.3
Description
IC CTRLR DMA SERIAL 2-CH TQFP144
Manufacturer
Infineon Technologies
Series
SEROCCO™r
Datasheet

Specifications of PEB 20542 F V1.3

Function
Serial Optimized Communications Controller
Interface
HDLC, PPP
Number Of Circuits
2
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
50mA
Power (watts)
150mW
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
144-LFQFP
Includes
Bit Processor Functions, Serial Communication Controllers (SCCs)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEB20542FV1.3X
SP000007633
3.2.3.5
Separate, externally generated receive and transmit clocks are supplied via pins RxCLK
and TxCLK. In addition separate receive and transmit clock gating signals are supplied
via pins RCG and TCG. These gating signals work on a per bit basis.
Figure 17
Data Sheet
clock mode 4
Clock Mode 4
Clock Mode 4 Configuration
RxCLK
TxCLK
RCG
RxD
TCG
TxD
Ctrl.
Ctrl.
RxCLK
CTS, CxD, TCG
CD, FSC, RCG
TxCLK
RTS
RxD
TxD
1 clock delay
56
transmit clock gate signal
receive clock gate signal
Functional Overview
clock supply
2
1
PEB 20542
PEF 20542
2000-09-14

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