PEB 20542 F V1.3 Infineon Technologies, PEB 20542 F V1.3 Datasheet - Page 89

no-image

PEB 20542 F V1.3

Manufacturer Part Number
PEB 20542 F V1.3
Description
IC CTRLR DMA SERIAL 2-CH TQFP144
Manufacturer
Infineon Technologies
Series
SEROCCO™r
Datasheet

Specifications of PEB 20542 F V1.3

Function
Serial Optimized Communications Controller
Interface
HDLC, PPP
Number Of Circuits
2
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
50mA
Power (watts)
150mW
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
144-LFQFP
Includes
Bit Processor Functions, Serial Communication Controllers (SCCs)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEB20542FV1.3X
SP000007633
4.1.1.4
Characteristics: no address recognition
No address recognition is performed and each complete frame will be stored in the SCC
receive FIFO.
4.1.2
The following figures give an overview about the management of the received frames in
the different HDLC operating modes. The graphics show the actual HDLC frame and
how SEROCCO-D interprets the incoming octets. Below that it is shown which octets are
stored in the RFIFO and will thus be transferred into memory.
Figure 41
Figure 42
Data Sheet
to RFIFO
to RFIFO
registers
registers
involved
involved
Address Mode 0
HDLC Receive Data Processing
HDLC Receive Data Processing in 16 bit Automode
HDLC Receive Data Processing in 8 bit Automode
FLAG
FLAG
compare)
(address
RAL1,2
RAH1,2 RAL1,2
ADDR
opt. 1)
(high)
(low)
8 bit
16 bit ADDR
compare)
option 1)
(address
CTRL
(low)
CTRL
I-field (data)
I-field (data)
89
CRC16
Detailed Protocol Description
option 2)
CRC16
/32
option 2)
/32
RSTA
RSTA
FLAG
PEB 20542
PEF 20542
2000-09-14
FLAG
RSTA
RSTA

Related parts for PEB 20542 F V1.3