PEB 20542 F V1.3 Infineon Technologies, PEB 20542 F V1.3 Datasheet - Page 142

• Manufacturer Part Number: PEB 20542 F V1.3
• Description: IC CTRLR DMA SERIAL 2-CH TQFP144
• Manufacturer: Infineon Technologies
• Series: SEROCCO™r

Specifications of PEB 20542 F V1.3

• Function: Serial Optimized Communications Controller
• Interface: HDLC, PPP
• Number Of Circuits: 2
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 50mA
• Power (watts): 150mW
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 144-LFQFP
• Includes: Bit Processor Functions, Serial Communication Controllers (SCCs)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEB20542FV1.3X; SP000007633

Data Sheet
Register 12
CPU Accessibility:
Reset Value:
Offset Address:
typical usage:
MRBFB
MRBFA
MRDTEB
MRDTEA
MTDTEB
MTDTEA
Bit
7
0
Mask Receive Buffer Full Interrupt Channel B
Mask Receive Buffer Full Interrupt Channel A
Mask Receive DMA Transfer End Interrupt Channel B
Mask Receive DMA Transfer End Interrupt Channel A
Mask Transmit DMA Transfer End Interrupt Channel B
Mask Transmit DMA Transfer End Interrupt Channel A
If a bit in this interrupt mask register is set to ’1’, the corresponding
interrupt is not generated and not indicated in the corresponding bit
position in the
MRBFB
DIMR
DMA Interrupt Mask Register
6
read/write
77
0F
H
H
MRDTEB MTDTEB
DISR
5
DMA Interrupt Mask Register
register. After reset all interrupts are masked.
5-142
4
3
0
Register Description (DIMR)
MRBFA
2
MRDTEA MTDTEA
1
PEB 20542
PEF 20542
2000-09-14
0