PEB 20542 F V1.3 Infineon Technologies, PEB 20542 F V1.3 Datasheet - Page 289

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PEB 20542 F V1.3

Manufacturer Part Number
PEB 20542 F V1.3
Description
IC CTRLR DMA SERIAL 2-CH TQFP144
Manufacturer
Infineon Technologies
Series
SEROCCO™r
Datasheet

Specifications of PEB 20542 F V1.3

Function
Serial Optimized Communications Controller
Interface
HDLC, PPP
Number Of Circuits
2
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
50mA
Power (watts)
150mW
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
144-LFQFP
Includes
Bit Processor Functions, Serial Communication Controllers (SCCs)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEB20542FV1.3X
SP000007633
Table 28
No. Parameter
Transmit
data rates
100 Clock
101 TxD to TxCLK delay (NRZ, NRZI encoding)
102 TxD to TxCLK delay (FM0, FM1, Manchester
103 TxD to TxCLK(out) delay (output function enabled) 10
104 CxD to TxCLK setup time
105 CxD to TxCLK hold time
106 RTS to TxCLK delay (not bus configuration mode)
Data Sheet
period
encoding)
CTS to TxCLK setup time
CTS to TxCLK hold time
RTS to TxCLK delay (bus configuration mode)
Transmit Cycle Timing
externally clocked
internally clocked
(DPLL modes)
internally clocked
(non DPLL modes)
externally clocked
internally clocked
(DPLL modes)
internally clocked
(non DPLL modes)
289
min.
0
0
0
62
480
62
5
5
5
5
Electrical Characteristics
Limit Values
max.
2
16
¥
¥
¥
25
25
20
20
16
25
PEB 20542
PEF 20542
2000-09-14
Unit
Mbit/s
Mbit/s
Mbit/s
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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