TMP91xy40FG Toshiba, TMP91xy40FG Datasheet - Page 109

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TMP91xy40FG

Manufacturer Part Number
TMP91xy40FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy40FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
M/F
Rom Combinations
128
Ram Combinations
4
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
4
I2c/sio Bus Channels
-
(s)dram Controller
-
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
3
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
-
Dual Clock
Y
Number Of I/o Ports
61
Power Supply Voltage(v)
2.2 to 3.6
SCLK2 output
(Shared with
PA2)
SCLK2 input
(Shared with
PA2)
RXD2
(Shared with
PA1)
f
φT0
SYS
SC2MOD0
<RXE>
φT0
φT2
φT8
φT32
RXDCLK
I/O interface mode
RB8
<BR2CK1:0>
Receive buffer 1 (Shift register)
Serial clock generator
BR2CR
2
Receive buffer 2 (SC2BUF)
φT2
Internal data bus
Receive counter
( ÷ 16 for UART)
Receive control
Prescaler
4
<BR2S3:0>
BR2CR
8
φT8
Baud rate
generator
16 32 64
<BR2ADDE>
BR2CR
Figure 3.10.4 SIO2 Block Diagram
φT32
SC2MOD0
<WU>
<OERR><PERR><FERR>
<BR2K3:0>
BR2ADD
<PE>
Parity control
91CW40-107
SC2CR
÷ 2
Error flag
SC2CR
Serial channel
interrupt control
<EVEN>
SC2MOD0
<SC1:0>
Internal data bus
SC2CR
<IOC>
I/O interface mode
UART
mode
TXDCLK
SC2MOD0
<SM1:0>
TB8
Transmit buffer (SC2BUF)
Internal data bus
Transmit counter
Transmit control
( ÷ 16 for UART)
SIOCLK
SC2MOD0
<CTSE>
TMP91CW40
2008-09-19
Interrupt request
INTRX2
INTTX2
TXD2
(Shared with
PA0)
(Shared with
PA2)
CTS
2

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